JPH0250392A - Memory - Google Patents

Abstract

PURPOSE:To reduce energy consumption accompanying refreshment by being equipped with a refresh signal generating means to output the refresh signal at a cycle according to the output of a temperature sensing means. CONSTITUTION:A dynamic random access memory (D-RAM) 26 is made into blocks at every bit of six-bit data, and six blocks (#0 to 5) exist in a memory 18. A memory control circuit 28 supplies refresh pulses to the respective blocks at the refresh cycle corresponding to a temperature sensed by a thermister 30. A table circuit 34 of the memory control circuit 28 operates the suitable refresh cycle corresponding to the temperature at the time of use by a table to obtain the refresh cycle conforming to the characteristic of the D-RAM 26 by means of a temperature signal from a sensing circuit 32. Thus, since the refresh cycle is altered, the energy consumption due to the refreshment can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a memory device, and more specifically to a memory device using a memory element that requires a refresh operation to retain memory.

[Conventional technology]

Dynamic Random Access Memory (D-RA)
In a memory device using M), it is necessary to perform a refresh operation at predetermined intervals in order to maintain memory. D-RAM
As shown in Figure 2, the refresh cycle is determined by the maximum operating temperature of each element, etc., and in actual memory devices, the refresh cycle is fixed at a refresh cycle that does not cause bit errors within the operating range. .

[Problem to be solved by the invention]

However, if such a memory device is battery-powered and the stored data is to be retained for a long period of time, operating each element at its worst value refresh cycle will consume a large amount of power and limit the data retention time. It has the disadvantage of being

In addition, since batteries generally tend to lose their performance at low temperatures, when a memory device is driven by batteries, there is a drawback that the retention time of stored data becomes shorter as the temperature decreases.

Therefore, it is an object of the present invention to provide a memory device that eliminates these drawbacks.

[Means to solve the problem]

A memory device according to the present invention is a memory device comprising a memory element that requires a refresh operation, and includes a temperature sensing means and a refresh signal generating means for outputting a refresh signal of a cycle according to the output of the temperature sensing means. It is characterized by comprising:

[Effect]

The refresh signal cycle is usually set according to the maximum temperature of the usage environment, and the actual usage temperature is lower than that. If the operating temperature is low, the refresh cycle can generally be long, so by changing the refresh cycle depending on the ambient temperature, power consumption due to refresh can be further reduced.

〔Example〕

Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

FIG. 1 shows a block diagram of an embodiment in which the present invention is applied to a memory device of a solid-state camera, in which 10 is an optical lens;
12 is a solid-state image element, 14 is a video signal processing circuit, 16 is an A/D converter, 18 is a memory device using D-RAM,
20 is a D/A converter, 22 is a low bus filter (LPF) for removing clock noise, and 24 is a control circuit. In this embodiment, A/D converter 16 outputs 6 bits of digital data and D/A converter 20 converts the 6 bits of digital data from memory device 18 to an analog signal. The functions of the control circuit 22 will be described later.

Briefly explaining the signal flow of the device shown in FIG. It is temporarily stored in the memory device 18. A signal read from the memory device 18 is converted into an analog signal by a D/A converter 20, and clock noise is removed by an LPF 22.

In the memory device 18, 26 is a D-RAM, and 28 is a D-RAM.
- A memory control circuit that controls the generation of the refresh cycle of the RAM 26 and the timing of data writing and successive output; 30 is a thermistor as a temperature sensor; D-R
AM26 is divided into blocks for each bit of 6-bit data, and therefore, six blocks (#0 to #5) exist in memory device 18. Memory control circuit 28 supplies refresh pulses to each block in a refresh cycle responsive to the temperature sensed by thermistor 30. FIG. 3 shows a block diagram of a portion of memory control circuit 28 that forms refresh pulses.

In FIG. 3, 32 is a temperature sensing circuit that converts the resistance change of the thermistor 30 due to temperature into an electrical signal indicating the temperature and outputs it, 34 is a table circuit that converts the output of the sensing circuit 32 into a table, and 36 is a variable This is a periodic oscillation circuit. The output pulse of the oscillation circuit 36 is applied to each D-RAM 26 as a refresh pulse. The table circuit 34 uses the temperature signal output from the sensing circuit 32 to generate a refresh signal based on the characteristics of the D-RAMZ6 used.
It has a table for obtaining cycles, which allows it to operate an appropriate refresh cycle depending on the temperature at the time of use. When the operating temperature is t ('c), the refresh cycle is τ(m s
) is set.

What is considered in the table circuit 34 is the D-R″AM26
It goes without saying that this has the worst characteristics among the six blocks, and that the refresh cycle that is set has some leeway.

In the embodiment shown in FIG. 3, refresh pulses of the same cycle are applied to all D-RAMs 26, but appropriate refresh pulses are applied individually depending on the temperature characteristics of each D-RAM used. A pulse may be applied. FIG. 4 shows a block diagram of a modified embodiment.
0 is a thermistor, 42 is a temperature sensing circuit, and these parts are the same as in FIG. 44 is a table circuit, 46 is an oscillation circuit 46, and 48 is a D-RAM corresponding to the D-RAM 26 in FIG. Table circuit 44 and oscillation circuit 46
are prepared in a number corresponding to the blocks (or number of data bits) of the D-RAM 48, and the table circuit 44 shows the temperature characteristics of each corresponding D-RAM 4B (see Fig. 2).
The oscillation circuit 46 outputs refresh pulses at intervals according to the outputs of the corresponding table circuits 44.

The temperature characteristics of the refresh cycle shown in Figure 2 vary considerably depending on each D-RAM, but as shown in Figure 4, data retention can be achieved by selecting an appropriate refresh cycle for each D-RAM. The period can be lengthened,
Power consumption can be further reduced. In the example in Figure 4, each D-R
Although table circuits are associated with AMs, it is of course possible to group D-RAMs with similar characteristics.

In the above embodiment, the refresh cycle is set according to the temperature using a table, but the present invention is not limited to irons. You can expect the following effects.

〔Effect of the invention〕

As can be easily understood from the above description, according to the present invention, the power consumption associated with refreshing can be reduced, and the amount of current flowing during the - time can also be reduced, so that the overall power consumption can be reduced. Therefore, in the case of battery drive,
Data can be retained for longer periods of time.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the configuration of an embodiment of the present invention, FIG. 2 is a diagram showing the temperature characteristics of a D-RAM refresh cycle, and FIG.
This figure is a block diagram of a refresh cycle changing circuit in the memory control circuit 3° of FIG. 1, and FIG. 4 is a modification of FIG. 3.

Claims (1)

[Claims] A memory device comprising a memory element that requires a refresh operation, characterized by comprising a temperature sensing means and a refresh signal generating means for outputting a refresh signal of a cycle according to the output of the temperature sensing means. Device.