JPS5922426U - Camera shutter time control circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

Figure 1 is a circuit diagram of an embodiment of the present invention, Figure 2 is a table showing examples of shutter speeds and calculation pulses for explaining the embodiment, and Figure 3 is a table showing examples of both shutter speeds and shutter speeds for a wide range of shutter speeds. Table showing both calculation and shutter counter displays. 4 and 5 are circuit diagrams of other embodiments of the present invention. 1: Reference pulse generator, 2: Input converter, 9: Arithmetic counter, 10: Arithmetic count storage circuit, 13: Shutter time counter, 14: Comparison circuit. Correction 1984. 3.10 The scope of claims for utility model registration shall be amended as follows. 0 Utility Model Registration Claims Shishata A storage circuit for storing a binary digital value corresponding to the logarithm of seconds, a binary counting circuit for counting pulses of one foot period during exposure, and each phase of the binary counting circuit. includes a plurality of detection means connected to the output terminals of the circuit, each shifted by -digit, detects a change in a multiple series of the count value of the binary allowable number circuit, and detects a change in the count value of the binary number circuit in a multiple series. A comparison circuit is provided which sequentially generates a detection output from a predetermined museum inspection means each time the museum is inspected, and forms a binary digital value that is sequentially updated in response to the detection output of each detection means, and the digital value of the storage circuit is A shutter speed control circuit for a camera, characterized in that exposure is terminated when the digital value from the comparison circuit and the digital value from the comparison circuit reach a predetermined relationship.

Claims (1)

[Scope of utility model registration request] A memory circuit that stores a digital comb value corresponding to the logarithm of the shutter-second time, a pulse counting circuit that counts clock pulses of a reference frequency during exposure, and a digital comb value that corresponds to the count value counted by the pulse counting circuit. A Cope transformation detector circuit converts the value into a code to form a digital value corresponding to the compressed value of the count value of the pulse counting circuit, and compares the digital value of the storage circuit with the digital value of the code conversion circuit, and compares both. 1. A comparator circuit for outputting an exposure end signal when a predetermined relationship is reached.