SU961128A1 - Digital peak detector - Google Patents

Description

one

The invention is intended to determine amplitude values of voltages of arbitrary shape and can be used to build digital measuring instruments.

Peak detectors are known, using operational amplifiers, storage capacitors, switches, the determination of the amplitude values of the input voltages in which is carried out by accumulating samples from the input voltage - 1 on the capacitor.

The disadvantage of these devices is the limited storage time of you, the running voltage and, as a result, low accuracy.

The closest technical. An entity to the present invention is a device comprising AND and OR elements, a comparison element, a code-voltage converter, a reversible counter, a trigger, a clock generator, a one-shot and an inverter 2.

A disadvantage of this device is its low speed and, as a result, low accuracy in converting high-speed voltages.

The purpose of the invention is to increase accuracy and speed.

ten

The goal is achieved by the fact that a digital peak detector containing a counter, a trigger, an OR element, a clock generator, and a one-shot are additionally entered.

t5 voltage converter is a time interval and a subtracting counter; the voltage is the time interval, the first input of the OR element, the R input of the counter and the S input of the counting counter, and the second output r with the R input of the trigger and the input of the parallel recording of the counting counter, the output of which is connected to the second input of the element OR whose output is connected to the S-input of the trigger, the direct output of which is connected to the control input of the counter, the discharge outputs of which are connected to the output buses of the device and the inputs of the bitwise write counter, whose clock input connects to the clock input of the counter and the output of the clock pulse generator., The drawing shows a block diagram of a digital peak detector. The digital peak detector contains a voltage converter 1, a time interval, the input of which is connected to the input bus of the device, and the output is connected to the control input of a 2-clock pulse generator, an OR 3 element, the output of which is connected to the S input trigger k, a single-oscillator 5, the input of which is connected to the control input of the generator 2 clock pulses, the first output is connected to the control input of the converter 1 voltage - time interval, the first input of the element OR 3, the R input of the counter 6 and the S input of the detracting counter 7, and the second the output is connected to the input of the parallel recording of the subtracting counter 7 and the R input of the trigger C, the direct output of which is connected to the control input of the counter 6, the discrete outputs of which are connected to the output buses of the device and the inputs of the 6: 1 recording of the subtracting counter 7, the output of which is connected to the second input of the element OR 3, and the generator output 2 of the clock pulses is connected to the clock inputs of the sweeper 6 and the subtractive counter 7. The digital peak detector works as follows. After turning on the power, the level of logic 1 is present at the first output of the single vibrator 5 for a certain time. The time interval holding the clock oscillator, the time interval in the voltage converter is in its initial state, setting the RS flip-flop to one, counter 6 and subtractive counter 7 - to zero. a single state, respectively. A logical 1 appears at the forward output of the RS flip-flop 4. After the specified time has passed, the input voltage of one or another polarity enters the input of the converter 1, where the number of pulses is transformed according to the formula, recorded by the counter; input voltage; constant time; clock frequency. The leading edge of the pulse of converter 1 starts a controlled oscillator of 2 clock pulses, after which directly from the generator output they begin to pass to the clock inputs of counter 6 and subtractive counter 7. After the first cycle of converter 1 has completed, the back edge of the pulse stops generator 2 and starts the one-shot 5, from the second output of which a short pulse with a duration of 100 NS or less with a logic level 1 is applied to the R input of trigger A, sets it to the zero state, and same to the input of parallel recording of counter 7, ensuring the rewriting of information contained in counter 6 into counter 7. With the arrival of the second clock pulse from the output of the control circuit included in converter 1, the detector's cycle of operation repeats with the difference that , if, where A is the previous value of the measured voltage, B is the current value of the measured voltage, the state of the elements included in the co. becoming a peak detector does not change, except for the state of counter 7, in which the original information from counter 6 pulses is copied from the second output of the one-oscillator 5. And in this case the pulses from the output of the clock generator 2 do not change the state of counter 6, since control input of this counter

There is a Lormese level O coming from the direct output of the RS flip-flop 4.

If BA, then when the counter 7 reaches the zero state, an impulse with a logic level 1 is formed at its output. This impulse translates the trigger into a single state, thereby allowing the further counting of pulses to counter 6. After the conversion is complete, three - the ger k pulse coming from the one-shot 5 returns to the zero state, and the new, recorded information in the counter 6 is rewritten into the counter 7, thus preparing it for a new work cycle.

Case A B is intermediate since, in this case, the RS flip-flop is turned into a single state, thereby permitting the counting of pulses to counter 6, but at the very next moment it returns to its initial state with a single vibrator 5, thus not changing the information recorded in counter 6 and rewritten into counter 7.

The use of modern logic ICs makes it possible to construct a high-speed digital peak detector with a conversion time around Q ISS, which brings it closer to the measurement speed of analog peak detectors, distinguished by a long storage time of the stored voltage peak

Claims (2)

1.Alekseenko A.G. and others. The use of precision analog IC. M., Sov. Radio, 1980, p. 183-190. 2. USSR author's certificate No. 664287, cl. H 03 K 5/153, 15.06.76 (prototype).