SU782153A1

SU782153A1 - Analogue-digital converter

Info

Publication number: SU782153A1
Application number: SU792722167A
Authority: SU
Inventors: Владимир Сергеевич Степанов
Original assignee: Калининградское Производственно- Конструкторское Объединение "Стрела"
Priority date: 1979-01-30
Filing date: 1979-01-30
Publication date: 1980-11-23

Description

(54) АНАЛОГО-ЦИФРОВОЙ ПРЕОБРАЗОВАТЕЛЬ(54) ANALOG-DIGITAL CONVERTER

1one

Изобретение относитс к технике преобразовани информации и измерительной технике.The invention relates to an information conversion technique and a measurement technique.

Известен аналого-цифровой преобразователь , содержащий генератор, аналоговые ключи дл подключени измер емого и эталонного напр ;жени , детектор пол рности, компаратсГр нул , генератор тактовых импульсов, счетчик импульсов, блок пам ти, блок индикации и триггер дл управлени в.ходными, аналоговыми ключами .An analog-to-digital converter is known, comprising a generator, analog switches for connecting the measured and reference voltages, a polarity detector, a comparator zero, a clock generator, a pulse counter, a memory unit, a display unit, and a trigger for controlling the input, analog keys.

Недостатком известнспо устройства вл етс ограниченное быстродействие . Минимальное врем преобразовани определ етс длительностью первого такта интегрировани и при фиксированной частоте генератора импульсов пропорционально количеству разр дов используемого счетчика импульсов .A disadvantage of the known device is the limited speed. The minimum conversion time is determined by the duration of the first integration cycle and at a fixed frequency of the pulse generator is proportional to the number of bits of the pulse counter used.

Цель изрбретени - увеличение быстродействи аналого-цифрового преобразовател .The goal of the invention is to increase the speed of the analog-digital converter.

Поставленна цель достигаетс тем, что в аналого-цифровой преобразователь , содержащий интегратор, ко входу которого через первый аналоговый ключ подключена шина входно-/The goal is achieved by the fact that an analog-to-digital converter containing an integrator, to the input of which, via the first analog switch, is connected to the input / output bus

го сигнала, а выход соединен через (детектор пол рности с управл ющим входом второго аналогового ключа и через компаратор нул с суммирующим входом первого счетчика и с управл ющими входами блока пам ти и индикатора и выходом генератора тактовых импульсов, при этом выходы разр дов первого счетчика соединены с signal and the output is connected via (polarity detector to the control input of the second analog key and through a zero comparator with the summing input of the first counter and with the control inputs of the memory unit and indicator and the output of the clock generator, while the bit outputs of the first counter connected to

10 первыми входами блока пам ти, выходы которого соединены со входами индикатора , а выход управл емого источника эталонного напр жени соединен с первым входом второго аналогового The 10 first inputs of the memory block, the outputs of which are connected to the inputs of the indicator, and the output of the controlled source of the reference voltage are connected to the first input of the second analog

15 ключа и через инвертор со вторым входом этого ключа, выход которого соединен со вторым входом первого аналогового ключа, введены второй счетчик , элемент И и j-K триггер, входы 15 key and through the inverter with the second input of this key, the output of which is connected to the second input of the first analog key, entered the second counter, the element And the j-K trigger, inputs

20 j и К которого соединены с его инверсным выходом, счетный вход - с выходом старшего разр да первого счетчика и первым входом элемента И, а пр мой выход - с управл емым входом 20 j and K of which are connected to its inverse output, the counting input - with the output of the higher bit of the first counter and the first input of the element I, and the direct output - with a controlled input

is первого анёшогового ключа и вторым входом элемента И, выход которого соединён с суммирующим входом второго счетчика, выходы разр дов которого соединены со вторыми входами блока is the first anishog key and the second input of the element I, the output of which is connected to the summing input of the second counter, the outputs of the bits of which are connected to the second inputs of the block

Claims

30 memories. 3 7 The drawing shows an analog-to-digital converter circuit. The analog-to-digital converter contains the first and second analog switches 1 and 2, the integrator 3, the controlled source 4 of the reference voltage, the inverter 5, the polarity detector ,; comparator 7 yul, first and second counters 8 and 9, element 10, J-K trigger 11, generator 12 clock pulses, memory block 13, indicator 14, input signal bus 15. The device operates as follows; In the initial state, the counters 8 and 9 pulses and trigger 11 are zero, the voltage at the integrator output is equal to zero. At the same time, the low potential from the direct output of the trigger prohibits the passage of pulses through the element 10 to the summing input of the second counter 9. The measured voltage is passed through analog switch 1 to integrator 3, the filling of the first counter 8 pulses from the generator 12 clock pulses starts simultaneously . The falling edge of the impulse, with the first counter 8 being full, will overturn three ger 11 into state 1, and the first counter will go to the zero state. Since the inputs. J and K of the trigger 11 are connected to its inverse output, which, after changing the state, received a zero potential, the trigger after tilting will not react to the pulses fed to its counting input, but will remain in which permits the passage of pulses from cTapmet-o of the first counter of the counter 8 through the element AND to the second part of the counter. From the moment the flip-flop 11 tilts, the second integration cycle begins. Changing the state of a trigger Leads to switching of key 1 and to: switch to. the integrator input 3 through the key 2 of the reference voltage. For the formation of an input voltage of arbitrary pblity, the output control of the source source 4 reference voltage with the input of the inverter 5. Depending on the voltage sign at the output of the integrator 3 at the end of the first integration cycle, the key 2 is controlled by the polar detector , connects KO to the input of the integrator 3, or the output of the voltage source 4, or the output of the inverter 5, so that the polarity of the voltage at the input of the integrator 3 in the second cycle of the integer E5yyoan is opposite to the polarity of the measured voltage. The end of the second integration cycle is determined by the voltage passing from; You are an integrator through. At this moment, the signal from the comparator 7 zero prohibits the passage of pulses from the generator of 12 clocks to the input of the first counter 8. The number recorded in the counters 8 and 9, which is directly measured voltage, is stored in the memory block 13 and goes to the indicator 14 for visual display. The analog-digital converter uses a disk-controlled source of 4 reference voltages. Depending on the control signal arriving at one of its m inputs K, ... K, you can get m values of the reference voltage UJT.I i a and, respectively, digital code values for each measured value. The use of a discrete-controlled reference voltage source allows us to expand the range of digital representation of measured analog values and build, for example, a measuring system for measuring the gains of a number of electronic paths, obtaining digital output data directly in tenth coefficient values. Analog-to-digital converter containing an integrator, to the input of which an input signal bus is connected via an analog switch, and the output is connected via a polarity detector with a control to the input of a second analog switch and through a comparator zero with a totalizer input of the first counter and with control inputs the PVIm block and the indicator and the output of the clock generator, while the outputs of the bits of the first counter are connected to the memory input, the outputs of which are connected to the indicator inputs, and the output the controlled reference voltage source is connected to the first input of the second analog switch and through an inverter with a second input of this switch, the output of which is connected to the second input of the first analog switch, characterized in that, in order to improve speed, a second counter is inserted, the element And JK trigger, inputs j and K of which are connected to its inverse output, a counting input with an output of the higher bit of the first, a counter and the first input of an And element, and a direct output with a controllable input of the first analog key and a second input of the ment and whose output is connected to the input of the second counter summyrukadim outputs bits which soedineyy to second inputs of the memory block. Sources of information taken into account in the examination 1. US Patent No. 3896431, cl. 340-347, 07.22.75.

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