SU570025A1 - Device for conversion of pulse frequency - Google Patents

Description

DEVICE FOR FREQUENCY CONVERSION

(54) PULSE

The invention relates to devices for analog-to-digital conversion of information of several signals represented as time intervals. Digital devices are known which can carry out sequential counting of pulses, comprising a generator of quantizing sequential pulses, a time selector, a counter with an indicator device, and a forming unit 11. However, this device has a low accuracy of conversion. The closest in technical essence to the present invention is a device for summing the durations of n pulse sequences, containing an analog adder to n inputs, the output of which is connected to the monitoring inputs of comparison units, a discrete level voltage reference sensor connected by its outputs to the reference inputs of comparison units, a counter , the pulse generator of the reference frequency, the main logic element AND, one input connected to the control trigger, and the other to the pulse generator reference frequency 2 1. The disadvantage of this device is a decrease in measurement accuracy. In order to control the accuracy of the circuit, a unit code converter is introduced into the binary code and additional logic elements AND according to the number of converter outputs, while the outputs of the blocks are connected through the code converter to the first inputs of additional logic elements AND, whose outputs are connected to the corresponding outputs The counter inputs, the second inputs are combined and connected to the output of the main lopic element I. The drawing shows the block diagram of the proposed device but. The device contains an analog adder 1 and n inputs, connected to the monitoring inputs of the comparison blocks 2, 3 and 4, to the reference inputs of which are connected the outputs of the sensor 5 reference spaces of discrete levels. The outputs of the comparison units through the converter 6 of the parallel unit code into binary are connected to the first inputs of logic gates And 7.8 and 9, the second inputs of which through the logic grip E10 are connected to the generator 11 of reference pulses

frequencies. The second input of the logic element And 10 is connected to the control trigger 12, and the outputs of the logic elements And 7.8 and 9 - to the corresponding bits of the pulse counter 13.

In the initial state, trigger 12 keeps logic element 10 closed, c. As a result, there are no signals in the code of element 10. The reset system (not shown) counts impulse & 13 is transferred to the initial zero state. The inputs of the analog adder 1 receive a sequence of pulses of the same duration I with a standard amplitude, while the amplitude (the signal at the output of the analog adder becomes proportional to the number of inputs to which the signals are currently received.

If there is a signal at one input of adder 1, the output signal is equal to UgbixjnpH if there are signals at two inputs of adder 1 ve; the output signal is 2 Usbixf if there are signals at the inputs of adder 1 simultaneously .direction voltage levels gives the support support inputs of comparison blocks 2,3 and 4 voltage levels: on2 vuKi,

nU:

Won3 2UBbixi; and,

OUT

OP4

The logic of operation of any unit of comparison is chosen so that it gives out a signal at an Ion-Uon, where UKOHTP is a voltage applied to the control input of the adder; Uoni is the voltage applied to the reference input of the adder.

Thus, if there is a pulse at some time, the signal on the one input of the adder is present only at the output of the comparison block 2, if at some time there is a pulse on only two certain inputs of the adder, the signals are present at the outputs of only blocks 2 and 3, etc.

Converter 6 converts a single input code to binary as follows. If the signal is only at the output of block 2, then the output signal is at the WB1 input connected to the logic element AND 7. If the signals are only at the outputs of blocks 2 and 3, then the output signal is at the output connected to the logic element AND 8. If there are signals at the three inputs of the converter 6, the input signals are at the outputs associated with logic gates And 7 and 8, etc.

The measurement of the total duration begins with the overturning of the control trigger 12, which is transferred to the second steady state, which enables the passage of signals from the oscillator 1 i to the pulse inputs of logic gates And 7, 8 and 9.

Depending on the number of signals simultaneously present at the input of the adder, the pulses of the generator 11 are supplied to the inputs of the corresponding bits of the counter. So, in the presence of

element 7 is opened, and the counting pulses are fed to the input of the first bit (counting input of the counter). If there are two signals, element 8 is opened, and the counting pulses go directly to the input of the second bit. In the presence of three signals, elements 7 and 8 are open, and pulses are applied simultaneously to the first and second bits, etc.

Thus, when there are signals on p

The inputs of the adder fill the counter in such a way that it is equivalent to filling with a frequency that is n times higher than the frequency of generator P. Therefore, the proposed device makes it possible to measure the total pulse duration with an accuracy n times greater than the accuracy provided by a known device.

Indeed, the maximum frequency of filling the prototype counter is n times larger than the minimum frequency. If the maximum frequency is done

commensurate with the cutoff frequency of the counters, then the measurement accuracy is determined by a frequency that is n times smaller. In the proposed device, the frequency of filling the counter (with one input signal) can be made commensurate with the cutoff frequency of the meter.

Claims (2)

1. Ermolov R.S. lbuji (X) Hi.ie h; 1С1Romers, Energie, 1973, p. 34-35. 2 .. Copyright certificate №368585, cl. G 04.F10 / 04. 1970,