JPS6428842A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JPS6428842A
JPS6428842A JP18479687A JP18479687A JPS6428842A JP S6428842 A JPS6428842 A JP S6428842A JP 18479687 A JP18479687 A JP 18479687A JP 18479687 A JP18479687 A JP 18479687A JP S6428842 A JPS6428842 A JP S6428842A
Authority
JP
Japan
Prior art keywords
film
polycrystalline
titanium silicide
annealing
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18479687A
Other languages
Japanese (ja)
Other versions
JPH0748495B2 (en
Inventor
Koji Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62184796A priority Critical patent/JPH0748495B2/en
Publication of JPS6428842A publication Critical patent/JPS6428842A/en
Publication of JPH0748495B2 publication Critical patent/JPH0748495B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
    • H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
    • H01L29/4933—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a silicide layer contacting the silicon layer, e.g. Polycide gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H01L29/456—Ohmic electrodes on silicon

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To prevent the reaction between a titanium silicide film and an insulating film, and improve the reliability, by covering the surface of a titanium silicide film formed on the surface of a polycrystalline Si electrode or a wiring with a titanium nitride film. CONSTITUTION:On an active region except an element isolation oxide film 12 on a substrate 11, a gate oxide film 13 is formed, and thereon polycrystalline silicon is formed as a gate electrode. After ion is implanted in the substrate 11, a diffusion layer 15 is formed by heat treatment. After coating of a Ti film, a titanium silicide film 17 is formed on the diffusion layer 15 and a polycrystalline layer 14, by annealing at a temperature of 600 deg.C in a nitrogen atmosphere. Next, a titanium nitride film 18 is formed on the film 17 surface, by annealing at a temperature of 850-950 deg.C in nitrogen. After depositing of an interlayer insulating film 20, a contact hole is formed, and Al is deposited. A wiring 21 is formed by patterning.
JP62184796A 1987-07-23 1987-07-23 Method for manufacturing semiconductor device Expired - Lifetime JPH0748495B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62184796A JPH0748495B2 (en) 1987-07-23 1987-07-23 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62184796A JPH0748495B2 (en) 1987-07-23 1987-07-23 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPS6428842A true JPS6428842A (en) 1989-01-31
JPH0748495B2 JPH0748495B2 (en) 1995-05-24

Family

ID=16159442

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62184796A Expired - Lifetime JPH0748495B2 (en) 1987-07-23 1987-07-23 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JPH0748495B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100238219B1 (en) * 1996-12-13 2000-01-15 윤종용 Gate pattern in silicon processing
KR100365749B1 (en) * 1995-12-29 2003-03-03 주식회사 하이닉스반도체 A method for fabrication of semiconductor device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61137367A (en) * 1984-12-10 1986-06-25 Hitachi Ltd Manufacture of semiconductor integrated circuit device
JPS6261345A (en) * 1985-09-11 1987-03-18 Hitachi Ltd Manufacture of semiconductor device
JPS6263448A (en) * 1986-09-29 1987-03-20 Hitachi Ltd Wiring structure in semiconductor element
JPS6298642A (en) * 1985-10-25 1987-05-08 Hitachi Ltd Semiconductor integrated circuit device and manufacture thereof
JPS6312152A (en) * 1986-07-02 1988-01-19 Mitsubishi Electric Corp Semiconductor device and manufacture thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61137367A (en) * 1984-12-10 1986-06-25 Hitachi Ltd Manufacture of semiconductor integrated circuit device
JPS6261345A (en) * 1985-09-11 1987-03-18 Hitachi Ltd Manufacture of semiconductor device
JPS6298642A (en) * 1985-10-25 1987-05-08 Hitachi Ltd Semiconductor integrated circuit device and manufacture thereof
JPS6312152A (en) * 1986-07-02 1988-01-19 Mitsubishi Electric Corp Semiconductor device and manufacture thereof
JPS6263448A (en) * 1986-09-29 1987-03-20 Hitachi Ltd Wiring structure in semiconductor element

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100365749B1 (en) * 1995-12-29 2003-03-03 주식회사 하이닉스반도체 A method for fabrication of semiconductor device
KR100238219B1 (en) * 1996-12-13 2000-01-15 윤종용 Gate pattern in silicon processing

Also Published As

Publication number Publication date
JPH0748495B2 (en) 1995-05-24

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