JPS6455846A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS6455846A JPS6455846A JP62213412A JP21341287A JPS6455846A JP S6455846 A JPS6455846 A JP S6455846A JP 62213412 A JP62213412 A JP 62213412A JP 21341287 A JP21341287 A JP 21341287A JP S6455846 A JPS6455846 A JP S6455846A
- Authority
- JP
- Japan
- Prior art keywords
- film
- silicide
- thin film
- forming
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
PURPOSE:To utilize a ceramic oxide superconducting thin film as wirings for a V-LSI by forming a high melting point thin film or a silicide compound thin film for forming a silicide with at least an impurity layer over an insulating film from the impurity layer, and forming a ceramic oxide superconducting film on the thin film disposed on the insulating film. CONSTITUTION:After an SiO2 film 2 is formed by a thermal oxidizing method on a P-type Si substrate 1, the film 2 is selectively opened, As<+> ions are implanted as normal, then heat treated in N2 gas at 900 deg.C to form a high concentration n<+> type region 6. Thereafter, after a platinum film 3 is formed by a sputtering method or an electron beam depositing method, it is heat treated at 250 deg.C to form a platinum silicide film 4. Thereafter, it is sputtered with a target of (Y0.33Ba0.66)0.66Cu3O7-delta to form a Y-Ba-Cu-O film 5 on the whole face. The substrate temperature is set to 700 deg.C at this time. Thus, it is effectively brought in contact by the silicide 4 with the region 6 of the substrate 1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62213412A JPS6455846A (en) | 1987-08-27 | 1987-08-27 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62213412A JPS6455846A (en) | 1987-08-27 | 1987-08-27 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6455846A true JPS6455846A (en) | 1989-03-02 |
Family
ID=16638798
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62213412A Pending JPS6455846A (en) | 1987-08-27 | 1987-08-27 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6455846A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01218045A (en) * | 1988-02-26 | 1989-08-31 | Nec Corp | Semiconductor device |
EP0444893A2 (en) * | 1990-02-28 | 1991-09-04 | Westinghouse Electric Corporation | Method of making ohmic contacts between semiconductors and oxide superconductors |
-
1987
- 1987-08-27 JP JP62213412A patent/JPS6455846A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01218045A (en) * | 1988-02-26 | 1989-08-31 | Nec Corp | Semiconductor device |
EP0444893A2 (en) * | 1990-02-28 | 1991-09-04 | Westinghouse Electric Corporation | Method of making ohmic contacts between semiconductors and oxide superconductors |
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