JPS6427255A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6427255A
JPS6427255A JP62183894A JP18389487A JPS6427255A JP S6427255 A JPS6427255 A JP S6427255A JP 62183894 A JP62183894 A JP 62183894A JP 18389487 A JP18389487 A JP 18389487A JP S6427255 A JPS6427255 A JP S6427255A
Authority
JP
Japan
Prior art keywords
region
transistor
emitter
inverter transistor
cmos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62183894A
Other languages
Japanese (ja)
Inventor
Yasuo Noguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62183894A priority Critical patent/JPS6427255A/en
Publication of JPS6427255A publication Critical patent/JPS6427255A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0623Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Bipolar Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)

Abstract

PURPOSE:To increase the working speed of an I<2>L for a bipolar CMOS integrated circuit by simultaneously forming one conductivity type first region as one part of an emitter in an inverter transistor for the I<2>L and one conductivity type second region as a well in a MOS transistor. CONSTITUTION:An N<+> type well region 7a as one part of an emitter region in an inverter transistor for an I<2>L and an N<+> type well region 7b in a P channel transistor for a CMOS are shaped simultaneously, thus improving the performance of both the I<2>L and the CMOS. That is, emitter concentration just under a base region 8 is increased, the injection efficiency of the inverter transistor can be enhanced and the storage of hole charges in an epitaxial layer can be reduced by forming the N<+> type well region 7a in concentration higher than the epitaxial layer 4 in an I<2>L section. Accordingly, the fT of the inverter transistor is augmented, and tpdmin can be made small, and the working speed of the I<2>L can be increased.
JP62183894A 1987-07-22 1987-07-22 Manufacture of semiconductor device Pending JPS6427255A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62183894A JPS6427255A (en) 1987-07-22 1987-07-22 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62183894A JPS6427255A (en) 1987-07-22 1987-07-22 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6427255A true JPS6427255A (en) 1989-01-30

Family

ID=16143675

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62183894A Pending JPS6427255A (en) 1987-07-22 1987-07-22 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6427255A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5203143A (en) * 1992-03-28 1993-04-20 Tempo G Multiple and split pressure sensitive adhesive stratums for carrier tape packaging system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5203143A (en) * 1992-03-28 1993-04-20 Tempo G Multiple and split pressure sensitive adhesive stratums for carrier tape packaging system

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