JPS6425434A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6425434A
JPS6425434A JP18146487A JP18146487A JPS6425434A JP S6425434 A JPS6425434 A JP S6425434A JP 18146487 A JP18146487 A JP 18146487A JP 18146487 A JP18146487 A JP 18146487A JP S6425434 A JPS6425434 A JP S6425434A
Authority
JP
Japan
Prior art keywords
film
insulating film
cvd
cavity
bpsg
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18146487A
Other languages
Japanese (ja)
Inventor
Takashi Osone
Masanori Fukumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP18146487A priority Critical patent/JPS6425434A/en
Publication of JPS6425434A publication Critical patent/JPS6425434A/en
Pending legal-status Critical Current

Links

Landscapes

  • Element Separation (AREA)
  • Local Oxidation Of Silicon (AREA)

Abstract

PURPOSE:To bury an insulating film in a flat structure having no cavity by correcting the film in a groove so as to have a smooth slope by a heat treatment. CONSTITUTION:After grooves are formed on a semiconductor substrate 1, a CVD SiO2 film is formed as a first insulating film 10 on a whole surface. Further, a BPSG film is formed by a CVD method as a second insulating film 22 on the upper face. When it is heat treated at 850-900 deg.C in O2 or N2 atmospheric gas for 5-30min, the BPSG film is softened, and second insulating film 12 smoothed in its surface shape is obtained. Further, a CVD SiO2 film is formed as a third insulating film 13 on the upper surface. In this case, since the base surface is smooth, the CVD SiO2 film is formed without cavity. Then, a first photoresist film 4 and a second photoresist film 5 are formed, and etched back to obtain a shape shown in Figure (e).
JP18146487A 1987-07-21 1987-07-21 Manufacture of semiconductor device Pending JPS6425434A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18146487A JPS6425434A (en) 1987-07-21 1987-07-21 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18146487A JPS6425434A (en) 1987-07-21 1987-07-21 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6425434A true JPS6425434A (en) 1989-01-27

Family

ID=16101213

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18146487A Pending JPS6425434A (en) 1987-07-21 1987-07-21 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6425434A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02304947A (en) * 1989-05-05 1990-12-18 American Teleph & Telegr Co <Att> Manufacture of semicowductor device
KR20010058498A (en) * 1999-12-30 2001-07-06 박종섭 Method of forming trench type isolation layer in semiconductor device
KR100384877B1 (en) * 1999-06-28 2003-05-22 주식회사 하이닉스반도체 A method for coating photoresist

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02304947A (en) * 1989-05-05 1990-12-18 American Teleph & Telegr Co <Att> Manufacture of semicowductor device
KR100384877B1 (en) * 1999-06-28 2003-05-22 주식회사 하이닉스반도체 A method for coating photoresist
KR20010058498A (en) * 1999-12-30 2001-07-06 박종섭 Method of forming trench type isolation layer in semiconductor device

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