JPS6410628A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6410628A
JPS6410628A JP16601187A JP16601187A JPS6410628A JP S6410628 A JPS6410628 A JP S6410628A JP 16601187 A JP16601187 A JP 16601187A JP 16601187 A JP16601187 A JP 16601187A JP S6410628 A JPS6410628 A JP S6410628A
Authority
JP
Japan
Prior art keywords
film
etched
si3n4
holes
etchant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16601187A
Other languages
Japanese (ja)
Inventor
Katsumi Toma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Original Assignee
Victor Company of Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd filed Critical Victor Company of Japan Ltd
Priority to JP16601187A priority Critical patent/JPS6410628A/en
Publication of JPS6410628A publication Critical patent/JPS6410628A/en
Pending legal-status Critical Current

Links

Landscapes

  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To sufficiently execute a reactive ion etching operation to an SiO2 film, to prevent an etching omission and to obtain a high-performance device by a method wherein an Si3N4 film is formed by a plasma etching method and a contact hole is made. CONSTITUTION:A gate electrode 13 composed of polysilicon is formed on a silicon substrate 12; an Si3N4 film 14 with a thickness of about 1000Angstrom is formed on the electrode by a CVD method; an SiO2 film 15 with a thickness of about 5000Angstrom is formed by the CVD method; after that, a resist is coated and a resist film 16 is formed. Then, the SiO2 film 15 is etched by a reactive ion etching method using CHF3 gas containing, e.g., 5% of O2 as an etchant. After this operation, the Si3N4 film 14 is etched by a plasma etching method using CF4 gas as the etchant; holes corresponding to holes 17 are made in the Si3N4 film 14. After completion of the etching operation, a thermal oxide film 11 is wet- etched by using a buffer HF solution; contact holes 18 are made; after that, a semiconductor device is completed by way of an Al wiring process and the like.
JP16601187A 1987-07-02 1987-07-02 Manufacture of semiconductor device Pending JPS6410628A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16601187A JPS6410628A (en) 1987-07-02 1987-07-02 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16601187A JPS6410628A (en) 1987-07-02 1987-07-02 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6410628A true JPS6410628A (en) 1989-01-13

Family

ID=15823242

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16601187A Pending JPS6410628A (en) 1987-07-02 1987-07-02 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6410628A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5210054A (en) * 1990-11-16 1993-05-11 Sharp Kabushiki Kaisha Method for forming a contact plug
KR100367497B1 (en) * 1995-12-29 2003-03-03 주식회사 하이닉스반도체 Method for manufacturing contact hole in semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5210054A (en) * 1990-11-16 1993-05-11 Sharp Kabushiki Kaisha Method for forming a contact plug
KR100367497B1 (en) * 1995-12-29 2003-03-03 주식회사 하이닉스반도체 Method for manufacturing contact hole in semiconductor device

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