JPS642469U - - Google Patents
Info
- Publication number
- JPS642469U JPS642469U JP9627987U JP9627987U JPS642469U JP S642469 U JPS642469 U JP S642469U JP 9627987 U JP9627987 U JP 9627987U JP 9627987 U JP9627987 U JP 9627987U JP S642469 U JPS642469 U JP S642469U
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- printed circuit
- lsi
- package type
- flat package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910000679 solder Inorganic materials 0.000 claims description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims 1
- 239000011889 copper foil Substances 0.000 claims 1
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
第１図：フラツトパツケージタイプのＬＳＩ組
込の状態平面図、第２図：本考案のプリント基板
要部平面図、第３図：本考案の要部断面図、第４
図：従来例のプリント基板要部平面図、第５図：
従来例の要部断面図、第６図：他の従来例の要部
断面図、第７図：他の従来例のプリント基板要部
平面図。
図面中、１はフラツトパツケージタイプのＬＳ
Ｉ、２はプリント基板、３はＬＳＩを嵌め込むた
めの穴、７はプリント基板のソルダーレジスト処
理部。
Figure 1: A plan view of a flat package type LSI built-in state, Figure 2: A plan view of the main parts of the printed circuit board of the present invention, Figure 3: A sectional view of the main parts of the present invention, Figure 4
Figure: Plan view of main parts of conventional printed circuit board, Figure 5:
FIG. 6: A cross-sectional view of a main part of another conventional example; FIG. 7: A plan view of a main part of a printed circuit board of another conventional example. In the drawing, 1 is a flat package type LS
I, 2 is a printed circuit board, 3 is a hole for fitting the LSI, and 7 is a solder resist processing section of the printed circuit board.
Claims (1)
穴を有し、且つ、当該ＬＳＩから導出された複数
の端子に接続されるパターン銅箔部を形成したプ
リント基板において、 上記穴の周囲に沿つてソルダーレジストを設け
たプリント基板。[Scope of Claim for Utility Model Registration] A printed circuit board that has a hole into which a flat package type LSI is inserted and has a patterned copper foil portion connected to a plurality of terminals derived from the LSI, A printed circuit board with solder resist along its periphery.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9627987U JPS642469U (en) | 1987-06-22 | 1987-06-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9627987U JPS642469U (en) | 1987-06-22 | 1987-06-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS642469U true JPS642469U (en) | 1989-01-09 |
Family
ID=31321146
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9627987U Pending JPS642469U (en) | 1987-06-22 | 1987-06-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS642469U (en) |
-
1987
- 1987-06-22 JP JP9627987U patent/JPS642469U/ja active Pending