JPS642449Y2 - - Google Patents
Info
- Publication number
- JPS642449Y2 JPS642449Y2 JP2113482U JP2113482U JPS642449Y2 JP S642449 Y2 JPS642449 Y2 JP S642449Y2 JP 2113482 U JP2113482 U JP 2113482U JP 2113482 U JP2113482 U JP 2113482U JP S642449 Y2 JPS642449 Y2 JP S642449Y2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- voltage
- power supply
- latch
- diodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000002265 prevention Effects 0.000 claims description 6
- 239000003990 capacitor Substances 0.000 description 12
- 238000010586 diagram Methods 0.000 description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 230000004888 barrier function Effects 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 230000002159 abnormal effect Effects 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 230000006866 deterioration Effects 0.000 description 3
- 230000001052 transient effect Effects 0.000 description 3
- 230000006378 damage Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 230000001960 triggered effect Effects 0.000 description 1
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Logic Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2113482U JPS58124964U (ja) | 1982-02-17 | 1982-02-17 | Ｃｍｏｓ型集積回路のラツチアツプ防止回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2113482U JPS58124964U (ja) | 1982-02-17 | 1982-02-17 | Ｃｍｏｓ型集積回路のラツチアツプ防止回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58124964U JPS58124964U (ja) | 1983-08-25 |
| JPS642449Y2 true JPS642449Y2 (ko) | 1989-01-20 |
Family
ID=30033265
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2113482U Granted JPS58124964U (ja) | 1982-02-17 | 1982-02-17 | Ｃｍｏｓ型集積回路のラツチアツプ防止回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58124964U (ko) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9391448B2 (en) * | 2013-09-17 | 2016-07-12 | The Boeing Company | High current event mitigation circuit |
-
1982
- 1982-02-17 JP JP2113482U patent/JPS58124964U/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58124964U (ja) | 1983-08-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5298797A (en) | Gate charge recovery circuit for gate-driven semiconductor devices | |
| US5479132A (en) | Noise and glitch suppressing filter with feedback | |
| JP2869791B2 (ja) | 半導体集積回路装置およびそれを応用した電子装置 | |
| CA1199688A (en) | Current source circuit having reduced error | |
| EP0174694B1 (en) | Circuit for generating a substrate bias | |
| US6252452B1 (en) | Semiconductor device | |
| US6751079B2 (en) | Circuit for the detection of short voltage glitches in a supply voltage | |
| JPH03205683A (ja) | 半導体集積回路装置 | |
| JPS642449Y2 (ko) | ||
| JPH0736516B2 (ja) | パワーオンリセット回路 | |
| JPS61222318A (ja) | パワ−オンリセツト回路 | |
| EP0582289B1 (en) | Transistor circuit for holding peak/bottom level of signal | |
| KR0159324B1 (ko) | 데이터 출력회로 | |
| JPH0611102B2 (ja) | 信号検出回路 | |
| US4841177A (en) | Comparator circuit operable for a wide range of input signal | |
| JP2926921B2 (ja) | パワーオンリセット回路 | |
| EP0072431B1 (en) | Driver circuit | |
| US4097771A (en) | Integrated clock pulse shaper | |
| JP3132212B2 (ja) | 水晶発振回路 | |
| JP2970054B2 (ja) | Ｄｃ−ｄｃコンバータ | |
| JPH04116708A (ja) | ボルテージレギュレータ | |
| JPH0245380B2 (ko) | ||
| JPS59147537A (ja) | パルス発生回路 | |
| JPH0311745Y2 (ko) | ||
| JP2002208851A (ja) | 半導体集積回路 |