JPS6417130A - Control system for input/output interruption of virtual computer - Google Patents

Control system for input/output interruption of virtual computer

Info

Publication number
JPS6417130A
JPS6417130A JP17410987A JP17410987A JPS6417130A JP S6417130 A JPS6417130 A JP S6417130A JP 17410987 A JP17410987 A JP 17410987A JP 17410987 A JP17410987 A JP 17410987A JP S6417130 A JPS6417130 A JP S6417130A
Authority
JP
Japan
Prior art keywords
input
output interruption
pxa520
carried out
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17410987A
Other languages
Japanese (ja)
Other versions
JP2517977B2 (en
Inventor
Shizuo Shiokawa
Yoshitsugu Kobashi
Eiichi Uozumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP17410987A priority Critical patent/JP2517977B2/en
Publication of JPS6417130A publication Critical patent/JPS6417130A/en
Application granted granted Critical
Publication of JP2517977B2 publication Critical patent/JP2517977B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)

Abstract

PURPOSE:To reduce the overhead at the time of an input/output interruption by storing the interruption information directly into a prefix area of an OS requiring the input/output processing. CONSTITUTION:At the time of an input/output interruption, a direct execution designating bit of a relevant OS and the head address of a prefix are PXA520 are read out of a buffer 26 based on an OS identifying display element received from a channel control part 3. Then the prefix PX conversion is carried out based on said head address when a control instruction given from the part 3 and the direct execution instruction of said OS show the direct execution respectively. The input/output interruption information is stored in the PXA520 and the input/output interruption information processing is carried out by a new PSW in the PXA520. While the PX conversion is carried out based on the head address of the PXA520 of a control program of a virtual computer if said instructions show no direct execution. Then the input/output interruption processing is carried out in the same way.
JP17410987A 1987-07-13 1987-07-13 Input / output interrupt control method in virtual machine Expired - Fee Related JP2517977B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17410987A JP2517977B2 (en) 1987-07-13 1987-07-13 Input / output interrupt control method in virtual machine

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17410987A JP2517977B2 (en) 1987-07-13 1987-07-13 Input / output interrupt control method in virtual machine

Publications (2)

Publication Number Publication Date
JPS6417130A true JPS6417130A (en) 1989-01-20
JP2517977B2 JP2517977B2 (en) 1996-07-24

Family

ID=15972804

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17410987A Expired - Fee Related JP2517977B2 (en) 1987-07-13 1987-07-13 Input / output interrupt control method in virtual machine

Country Status (1)

Country Link
JP (1) JP2517977B2 (en)

Also Published As

Publication number Publication date
JP2517977B2 (en) 1996-07-24

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