JPS55157055A - Disc cash control unit - Google Patents

Disc cash control unit

Info

Publication number
JPS55157055A
JPS55157055A JP6544679A JP6544679A JPS55157055A JP S55157055 A JPS55157055 A JP S55157055A JP 6544679 A JP6544679 A JP 6544679A JP 6544679 A JP6544679 A JP 6544679A JP S55157055 A JPS55157055 A JP S55157055A
Authority
JP
Japan
Prior art keywords
instruction
program
control unit
mode
mode set
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6544679A
Other languages
Japanese (ja)
Inventor
Yoshio Hamaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP6544679A priority Critical patent/JPS55157055A/en
Publication of JPS55157055A publication Critical patent/JPS55157055A/en
Pending legal-status Critical Current

Links

Landscapes

  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE: To optimize the data access time, by performing the control operation of cash for the operation according to the operating mode set with the program.
CONSTITUTION: The program on a central processing unit 3 executes an input and output instruction starting the mode set instruction, then the control section 6 of a disc cash control unit 1 receives this instruction and when it is interpreted as mode set instruction, section 6 receives mode information as data relating this instruction, and stores it to a mode register 11. Further, when the program executes the input and output instruction starting the read-in or write-in instruction, the control section 6 reads out the mode register 11 through the interpretation of the read-in or write-in instruction, and the next operation is determined according to the content.
COPYRIGHT: (C)1980,JPO&Japio
JP6544679A 1979-05-25 1979-05-25 Disc cash control unit Pending JPS55157055A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6544679A JPS55157055A (en) 1979-05-25 1979-05-25 Disc cash control unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6544679A JPS55157055A (en) 1979-05-25 1979-05-25 Disc cash control unit

Publications (1)

Publication Number Publication Date
JPS55157055A true JPS55157055A (en) 1980-12-06

Family

ID=13287362

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6544679A Pending JPS55157055A (en) 1979-05-25 1979-05-25 Disc cash control unit

Country Status (1)

Country Link
JP (1) JPS55157055A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5873085A (en) * 1981-10-15 1983-05-02 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Control of memory hierarchy
JPS5960552A (en) * 1982-09-27 1984-04-06 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Peripheral data memory system
JPH0250238A (en) * 1988-08-11 1990-02-20 Nec Corp Data processor with cache memory

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5873085A (en) * 1981-10-15 1983-05-02 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Control of memory hierarchy
JPH037978B2 (en) * 1981-10-15 1991-02-04 Intaanashonaru Bijinesu Mashiinzu Corp
JPS5960552A (en) * 1982-09-27 1984-04-06 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Peripheral data memory system
JPH0250238A (en) * 1988-08-11 1990-02-20 Nec Corp Data processor with cache memory

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