JPS6410370A - Bus request circuit - Google Patents
Bus request circuitInfo
- Publication number
- JPS6410370A JPS6410370A JP16525987A JP16525987A JPS6410370A JP S6410370 A JPS6410370 A JP S6410370A JP 16525987 A JP16525987 A JP 16525987A JP 16525987 A JP16525987 A JP 16525987A JP S6410370 A JPS6410370 A JP S6410370A
- Authority
- JP
- Japan
- Prior art keywords
- main storage
- storage unit
- bus
- request
- central processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
Abstract
PURPOSE:To improve the effective utilization rate of a common bus by providing a main storage unit selection circuit outputting a selection signal selecting a main storage unit based on memory address information and interleave information of the main storage unit and a request encoder circuit outputting the selection signal outputted therefrom, a bus request signal giving a use request of a common bus and a data representing a main storage unit number to a bus control unit. CONSTITUTION:When a central processing unit 12 gives a use request of the common bus 10 to access any of main storage units, a central processing unit 12 references a status signal of each main storage unit fed onto exclusive buses 7, 8 and interleave information of N-set of main storage units 16, 18 fed to an exclusive bus 9. Then a bus request signal 24 giving a use request of the common bus 10 and a data 26 representing the main storage unit number specifying the main storage unit to be accessed are fed to a bus control section 30. The processing above is not limited to the central processing unit 12 but applied to other units.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16525987A JPS6410370A (en) | 1987-07-03 | 1987-07-03 | Bus request circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16525987A JPS6410370A (en) | 1987-07-03 | 1987-07-03 | Bus request circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6410370A true JPS6410370A (en) | 1989-01-13 |
Family
ID=15808924
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16525987A Pending JPS6410370A (en) | 1987-07-03 | 1987-07-03 | Bus request circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6410370A (en) |
-
1987
- 1987-07-03 JP JP16525987A patent/JPS6410370A/en active Pending
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