JPS6426250A - Memory readout circuit for cpu - Google Patents

Memory readout circuit for cpu

Info

Publication number
JPS6426250A
JPS6426250A JP18121287A JP18121287A JPS6426250A JP S6426250 A JPS6426250 A JP S6426250A JP 18121287 A JP18121287 A JP 18121287A JP 18121287 A JP18121287 A JP 18121287A JP S6426250 A JPS6426250 A JP S6426250A
Authority
JP
Japan
Prior art keywords
cpu
bits
memory
data
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18121287A
Other languages
Japanese (ja)
Inventor
Shinichi Men
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP18121287A priority Critical patent/JPS6426250A/en
Publication of JPS6426250A publication Critical patent/JPS6426250A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To control memory access to a memory which is smaller than the number of bits of the data bus of a CPU by accessing plural areas corresponding to one memory read from the CPU and reading data consisting of bits as many as the bits of the CPU. CONSTITUTION:The memory 2 has a data bus consisting of bits less than the bits of the data bus of the CPU 1, a read means 20 divides the address space of the memory 2 into plural areas, accesses those areas successively corresponding to one memory read from the CPU 1, and read data consisting of bits as many as the bits of the CPU 1 are provided, and a means 20 sends an end indication 14 to the CPU at the end of a read of the data consisting of bits as many as the bits of the data bus of the CPU 1. Consequently, programs and data are easily read out of the memory 2 consisting of data bits less than the bits of the data bus of the CPU 1.
JP18121287A 1987-07-22 1987-07-22 Memory readout circuit for cpu Pending JPS6426250A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18121287A JPS6426250A (en) 1987-07-22 1987-07-22 Memory readout circuit for cpu

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18121287A JPS6426250A (en) 1987-07-22 1987-07-22 Memory readout circuit for cpu

Publications (1)

Publication Number Publication Date
JPS6426250A true JPS6426250A (en) 1989-01-27

Family

ID=16096786

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18121287A Pending JPS6426250A (en) 1987-07-22 1987-07-22 Memory readout circuit for cpu

Country Status (1)

Country Link
JP (1) JPS6426250A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0340517A (en) * 1989-07-06 1991-02-21 Mitsubishi Electric Corp Driving/protecting circuit for power device
US6441679B1 (en) 2000-02-14 2002-08-27 Yazaki Corporation Semiconductor active fuse operating at higher supply voltage employing current oscillation
US7221208B2 (en) 2003-01-16 2007-05-22 Shindengen Electric Manufacturing Co., Ltd. Switching circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0340517A (en) * 1989-07-06 1991-02-21 Mitsubishi Electric Corp Driving/protecting circuit for power device
US6441679B1 (en) 2000-02-14 2002-08-27 Yazaki Corporation Semiconductor active fuse operating at higher supply voltage employing current oscillation
US7221208B2 (en) 2003-01-16 2007-05-22 Shindengen Electric Manufacturing Co., Ltd. Switching circuit

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