JPS6432348A - Memory access system - Google Patents

Abstract

PURPOSE:To improve the performance of a memory access system by regarding the buffer areas, etc., scattering in a physical memory space as one continuous memory area of an input/output buffer, etc., and giving the automatic and continuous accesses to plural partial areas after a single direct programming action given to a memory access device by a CPU. CONSTITUTION:When the information is transferred from a memory 12, a CPU sets the total transfer length (byte number) at a counter 26 of a DMA device 13. Then the CPU 11 takes out the head memory address A0 of a head input/ output buffer 0 and sets lower 12 bits of the address A0 at a counter 25. Then the memory addresses A0-n included in the buffer description words BDW0-n are successively transferred and written into a page number memory 21 at and after an address 0. A selector 31 selects a write signal 29 in accordance with a selection number 30 of a control part 23. A counter 22 shows the following write addresses every time 12 bits (page No.) are written. The device 13 become enable when the writing action is through up to an address (n). Hereafter the information is transferred by the start and the counter 26 transmits a transfer end signal 27 to the part 23 when an access is given to the final word position of the final buffer.