JPS5553744A - Microprogram storing system - Google Patents

Microprogram storing system

Info

Publication number
JPS5553744A
JPS5553744A JP12679078A JP12679078A JPS5553744A JP S5553744 A JPS5553744 A JP S5553744A JP 12679078 A JP12679078 A JP 12679078A JP 12679078 A JP12679078 A JP 12679078A JP S5553744 A JPS5553744 A JP S5553744A
Authority
JP
Japan
Prior art keywords
type
order
output
microorder
word
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12679078A
Other languages
Japanese (ja)
Inventor
Kiyoshi Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP12679078A priority Critical patent/JPS5553744A/en
Publication of JPS5553744A publication Critical patent/JPS5553744A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To realize an effective application of the memory by classifying the miroorder into tow types according to the length of the word and giving the information indicating the type to the specific bit of the order to store the order of the larger word length into the memory in the amount equivalent to two words.
CONSTITUTION: For the microorder, the order featuring the shorter word length is defined as type I, and the order featuring the double word length is defined as type II respectively. Thus the order of type I is stored in one word of program memory MM, and the order of type II is stored in two words of MM each. The highest bit of each microorder shows its type, and 0 and 1 are set for type I and II respectively. At the same time, the lowest bit of type II is set to 1. In such microprogram storing method, when the microorder is read out from MM based on the address shown by output 401 of address register ADR, output 406 of microorder register MIR2 is delivered to buffer BUF in case output 407 of the lowest bit is 1. And not output of MIR2 is vigen to BUF when output 407 is 0.
COPYRIGHT: (C)1980,JPO&Japio
JP12679078A 1978-10-17 1978-10-17 Microprogram storing system Pending JPS5553744A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12679078A JPS5553744A (en) 1978-10-17 1978-10-17 Microprogram storing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12679078A JPS5553744A (en) 1978-10-17 1978-10-17 Microprogram storing system

Publications (1)

Publication Number Publication Date
JPS5553744A true JPS5553744A (en) 1980-04-19

Family

ID=14943997

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12679078A Pending JPS5553744A (en) 1978-10-17 1978-10-17 Microprogram storing system

Country Status (1)

Country Link
JP (1) JPS5553744A (en)

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