JPS5688524A - Channel controller - Google Patents
Channel controllerInfo
- Publication number
- JPS5688524A JPS5688524A JP16603879A JP16603879A JPS5688524A JP S5688524 A JPS5688524 A JP S5688524A JP 16603879 A JP16603879 A JP 16603879A JP 16603879 A JP16603879 A JP 16603879A JP S5688524 A JPS5688524 A JP S5688524A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- controller
- transfer information
- channel
- processing speed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To increase the processing speed of a channel CH controller, by equipping the CH contrller with a transfer information storage memory, pointer register stored with addresses of the memory and a register stored with the in-use state of the memory.
CONSTITUTION: Channel CH controller 3 is provided with memory M1 capable of storing pieces of transfer information as many as devices of I/Os operation simultaneously, pointer register group M2 that makes the pieces of transfer information in memory M1 correspond to respective I/Os, and register RG that stores the maximum address of the area of memory M1. Consequently, since the memory capacity of memory M1 has no relation to the maximum number of I/Os that can be connected to device 3, only the small memory capacity is required and this controller is superior to the usual one in terms of manufacturing cost and reliability. In addition, since only data transfer is performed between main starage device 1 and controller 3, the processing speed of controller 3 is increased and the processing performance of the computer is improved on the whole.
COPYRIGHT: (C)1981,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16603879A JPS5688524A (en) | 1979-12-20 | 1979-12-20 | Channel controller |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16603879A JPS5688524A (en) | 1979-12-20 | 1979-12-20 | Channel controller |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5688524A true JPS5688524A (en) | 1981-07-18 |
Family
ID=15823790
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16603879A Pending JPS5688524A (en) | 1979-12-20 | 1979-12-20 | Channel controller |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5688524A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60108951A (en) * | 1983-11-17 | 1985-06-14 | Fujitsu Ltd | Data chaining system |
JPS60142455A (en) * | 1983-12-29 | 1985-07-27 | Fujitsu Ltd | Index processing system of routine table |
JPS60150152A (en) * | 1984-01-17 | 1985-08-07 | Fujitsu Ltd | Channel control system |
JPH01125644A (en) * | 1987-11-11 | 1989-05-18 | Hitachi Ltd | Data transfer equipment |
JPH01312654A (en) * | 1988-06-13 | 1989-12-18 | Fujitsu Ltd | Dynamic allocating system for sub channel area |
-
1979
- 1979-12-20 JP JP16603879A patent/JPS5688524A/en active Pending
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60108951A (en) * | 1983-11-17 | 1985-06-14 | Fujitsu Ltd | Data chaining system |
JPH0122939B2 (en) * | 1983-11-17 | 1989-04-28 | Fujitsu Ltd | |
JPS60142455A (en) * | 1983-12-29 | 1985-07-27 | Fujitsu Ltd | Index processing system of routine table |
JPS60150152A (en) * | 1984-01-17 | 1985-08-07 | Fujitsu Ltd | Channel control system |
JPH01125644A (en) * | 1987-11-11 | 1989-05-18 | Hitachi Ltd | Data transfer equipment |
JPH01312654A (en) * | 1988-06-13 | 1989-12-18 | Fujitsu Ltd | Dynamic allocating system for sub channel area |
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