JPS6396993A - Method of inspecting punching discrepancy of printed board - Google Patents

Abstract

(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a method for inspecting a deviation in the punched outline of a printed circuit board.

<Summary of the Invention> The present invention provides a printed circuit board with a check pattern made of a conductor, uses the mold to punch out the check pattern when punching the outer shape of the printed circuit board with a mold, and establishes electrical continuity of the check pattern. By checking for the presence or absence of this, it is possible to quickly and accurately check whether the punching deviation is within the tolerance.

<Prior art> Conventionally, when inspecting the appearance of a printed circuit board, the punching deviation of the circuit by the mold was visually inspected. Because of the inspection, the delicate judgment of whether the deviation exceeded the tolerance was inaccurate, and the inspection required a lot of manpower and time.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for inspecting punching misalignment of a printed circuit board, which is capable of accurately inspecting a printed circuit board using an electrical continuity check, whereas the conventional inspection method was as accurate as visual inspection.

Means for Solving Problems> The present invention provides a check pattern made of a conductor on a printed circuit board, and when punching an outer shape of the printed circuit board with a mold, punches out the check pattern using the mold. The method is characterized in that the electrical continuity of the check pattern is checked to check for punching misalignment.

<Operation> As described above, since the punching misalignment is checked by electrical continuity, it is possible to quickly and accurately check whether the punching misalignment is within the tolerance.

<Example> Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1(a) shows an example of a check pattern formed on a part of the printed circuit board A, and shows the check land l.
It consists of a, lb, 2a, 2b and punched lands 3a, 3b. This check pattern is preferably provided at the same time as the conductor pattern is formed.

Next, when punching out the outer shape of the printed circuit board A using a die, punch holes 4 are simultaneously punched out using the die to match the centers of the punch lands 3a and 3b. Here, the diameter of the punched hole 4 and the diameter of the punched lands 3a, 3b are determined based on the tolerance of the punching deviation, which will be described later.

FIG. 1(b) shows the case where the punched hole 4 is punched within the tolerance, and the punched hole 4 does not reach the outer periphery of the punched lands 3a and 3b, but between the check lands 1a-2a.
It can be seen that there is electrical continuity between 1b and 2b, and that the punching deviation is within the tolerance.

Fig. 1(c), ((to) is the case where the punched hole 4 is punched out beyond the tolerance, and in the case of Fig. 1(C), the punched hole 4 reaches the outer periphery of the punched land 3a. and
Although there is electrical continuity between the check lands 1b and 2b, there is no electrical continuity between the check lands 1a and 2a, which indicates that the punching deviation is greater than the tolerance. In addition, as shown in Fig. 1 (in the case of small size), the punched hole 4 reaches the outer periphery of the punched lands 3a and 3b, and there is no electrical continuity between the check holes 1a and 2a and between 1b and 2b. As in Figure 41, it can be seen that the punching deviation is greater than the tolerance.

In the above check pattern, ° punched hole 1
.

4 and the difference between the diameters of the punched lands 3a and 3b, which is 4, is the allowable deviation tolerance.

FIG. 2 shows another embodiment of the check pattern. As shown in FIG. 2(a), punching lands 3 are formed circumferentially on a printed circuit board using a linear pattern.
Check lands 1°2 are formed at both ends. Even in the case of such a check pattern, as in Fig. 1, when the punched hole 4 is within the tolerance, it will be as shown in Fig. 2 (b), and there is electrical continuity between the check lands 1 and 2. If the punched hole 4 deviates beyond the tolerance, see Figure 2 (c).
, (d), and there is no electrical continuity between the check lands 1 and 2. In this case, the allowable deviation tolerance is the first
It is similar to the figure.

In addition, as shown in FIGS. 3(a) and 3(b), there is a special permissible gap in which the punching land 3 is formed into a substantially rectangular shape and the deviation in only one direction such as the X-axis direction or the Y-axis direction is detected. It becomes a tolerance.

Note that it is also possible to use the circuit conductor pattern as the check pattern.

As described above, according to the present invention, it is possible to detect deviations in punching of printed circuit boards, which are useful in that it is no longer possible to inspect deviations in punching of printed circuit boards by electrical checking using a checker, which conventionally relied only on visual inspection. We can provide testing methods.

[Brief explanation of the drawing]

1 and 2 show different embodiments of the present invention, respectively (ω is a plan view of a check pattern, and FIG.
is a plan view when the punching deviation is within the tolerance; the same figure (C)
, 3(d) are plan views when the punching deviation is greater than the tolerance, and FIGS. 3(a) and 3(b) are plan views of check patterns showing other embodiments. A-...Printed circuit board h 1 p 1 av 1 b
+ 2 t 2 a + 2b...Land for check %3.3a, 3b...Punching land. Agent Patent attorney Takeshi Sugiyama (and 1 other person) CG) (C) (Q) Cb) Δ (C) Figure 2 (G) Figure 3

Claims (1)

[Claims] 1. A check pattern made of a conductor is provided on the printed circuit board, and when the outer shape of the printed circuit board is punched out using a mold,
A printed circuit board punching misalignment inspection method comprising: punching out the check pattern using the mold, and inspecting the punching misalignment by checking electrical continuity of the check pattern.