JPH02237091A - Printed wiring board - Google Patents

Printed wiring board

Info

Publication number
JPH02237091A
JPH02237091A JP1058228A JP5822889A JPH02237091A JP H02237091 A JPH02237091 A JP H02237091A JP 1058228 A JP1058228 A JP 1058228A JP 5822889 A JP5822889 A JP 5822889A JP H02237091 A JPH02237091 A JP H02237091A
Authority
JP
Japan
Prior art keywords
circuit pattern
power line
cut
chip
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1058228A
Other languages
Japanese (ja)
Inventor
Mitsuru Shimoda
下田 充
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP1058228A priority Critical patent/JPH02237091A/en
Publication of JPH02237091A publication Critical patent/JPH02237091A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0266Marks, test patterns or identification means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Structure Of Printed Boards (AREA)

Abstract

PURPOSE:To surely check that a chip component is mounted or not in a circuit functional test so as to complement a visual check to correct misses occurred in it a method wherein a divided conductor pad provided with a cut is provided to a part of a circuit pattern. CONSTITUTION:A divided conductor pad 5 (5-1, 5-2) provided with a cut 5a which cuts off a power line circuit pattern 1 is provided to the halfway point of the power line circuit pattern 1. If an electrode 3a of a chip capacitor 3 is connected to the pad 5, the power line circuit pattern 1 operates normally in a circuit function test after the mounting of electronic components as the pads 5-1 and 5-2 are connected together through a bridge of the electrode 3a. If the chip capacitor 3 is omitted to be connected (including incomplete connection), the pads 5-1 and 5-2 are kept isolated from each other and the power line circuit pattern 1 is kept in a cutoff state, so that the circuit pattern 1 does not normally operate in a circuit functional test after the mounting of electronic components. By this setup, even if the omission of connection is overlooked in a visual check, it can be surely checked that the capacitor 3 is mounted or not.

Description

【発明の詳細な説明】 〔概要〕 チップ部品を搭載接続する導体パッドを有する印刷配線
板に係り、さらに詳しくは、導体パッドの形状に関し、 電子部品実装後の回路機能試験でチップ部品の搭載有無
が確実にチェックできることを目的とし、チップ部品の
一電極を接続する切れ目を有する分割導体パッドを回路
パターンの途中に設け、該切れ目により前記回路パター
ンを切断するように構成する. 〔産業上の利用分野〕 本発明はチップ部品を搭載接続する導体パッドを有する
印刷配線板に係り、さらに詳しくは、導体パッドの形状
に関する。
[Detailed Description of the Invention] [Summary] This relates to a printed wiring board having conductor pads for mounting and connecting chip components, and more specifically, regarding the shape of the conductor pads, it is possible to determine whether or not chip components are mounted in a circuit function test after mounting electronic components. In order to be able to check reliably, a divided conductor pad having a cut for connecting one electrode of a chip component is provided in the middle of the circuit pattern, and the circuit pattern is cut by the cut. [Industrial Application Field] The present invention relates to a printed wiring board having conductor pads for mounting and connecting chip components, and more particularly to the shape of the conductor pads.

電子・通信機器において、電子回路の高密度実装化を図
るため表面実装技術によるチップ部品の実装が行われて
いるが、部品が小さいためその搭載有無の目視検査では
見落とす場合があり、もっと確実に搭載有無の検査がで
きるようにすることが要望されている. (従来の技術〕 第4図に示す一回路図は、電源線11aとアース線12
a間にノイズフィルタとしてのチップコンデンサ13と
、ICなどの能動素子14で構成される電子回路である
. この電子回路を印刷配線板上に構成する場合、従来の印
刷配線板は第5図の平面図に示すように、第4図の電源
線11aとアース線12aにそれぞれ対応する電源線回
路パターン11とアース線回路パターン12を設け、そ
れぞれの回路パターン11.12の途中に一点鎖線で示
すチップ部品13、即ちチップコンデンサの電極13a
を接続する導体パッドl5と16を設けるとともに末端
に2点鎖線で示すIC14のリード14aを接続する導
体パッドl7を形成している. 〔発明が解決しようとする課題〕 しかしながら、このような上記印刷配線板によれば、電
子部品実装後の検査において、電子回路上の主要部品で
あるICなどの搭載有無は最終試験である回路機能試験
で容易にチェックすることができるが、ノイズフィルタ
として働くチップコンデンサの実装漏れを小さいが故に
目視試験で見落とすと、チップコンデンサが接続されて
いなくても電源線は接続状態にあるため、回路機能試験
ではチェックが難しいといった問題があった。
In electronic and communication equipment, chip components are mounted using surface mount technology in order to achieve high-density mounting of electronic circuits, but since the components are small, they may be overlooked during visual inspection to see if they are mounted. It is requested that it be possible to inspect the presence or absence of equipment. (Prior art) One circuit diagram shown in FIG. 4 shows a power line 11a and a ground line 12.
This is an electronic circuit consisting of a chip capacitor 13 as a noise filter between .a and an active element 14 such as an IC. When configuring this electronic circuit on a printed wiring board, the conventional printed wiring board has a power line circuit pattern 11 corresponding to the power line 11a and the ground line 12a of FIG. 4, respectively, as shown in the plan view of FIG. and ground line circuit patterns 12 are provided, and in the middle of each circuit pattern 11.12 there is a chip component 13 shown by a dashed line, that is, an electrode 13a of a chip capacitor.
Conductor pads l5 and 16 are provided to connect the terminals, and a conductor pad l7 is formed at the end to connect the lead 14a of the IC 14, which is indicated by a two-dot chain line. [Problem to be Solved by the Invention] However, according to the above-mentioned printed wiring board, in the inspection after electronic components are mounted, the presence or absence of mounting of ICs, etc., which are the main components on the electronic circuit, is determined by the circuit function, which is a final test. Although it can be easily checked during a test, if a chip capacitor that acts as a noise filter is overlooked during a visual test because it is small, the circuit function will be affected because the power line is connected even if the chip capacitor is not connected. There were some problems in the exam that it was difficult to check.

上記問題点に鑑み、本発明は電子部品実装後の回路機能
試験でチップ部品の搭載有無が確実にチェックできる印
刷配線板を提供することを目的とする. 〔課題を解決するための手段〕 上記目的を達成するために、本発明の印刷配線板におい
ては、 チップ部品p一電極を接続する切れ目を有する
分割導体パッドを回路パターンの途中に設け、該切れ目
により前記回路パターンを切断するように構成する。
In view of the above problems, an object of the present invention is to provide a printed wiring board that can reliably check the presence or absence of chip components in a circuit function test after mounting electronic components. [Means for Solving the Problems] In order to achieve the above object, in the printed wiring board of the present invention, a divided conductor pad having a cut for connecting the chip component p and the electrode is provided in the middle of the circuit pattern, and the cut The circuit pattern is cut by cutting the circuit pattern.

〔作用〕[Effect]

回路パターンの途中に切れ目を存する分割導体パッドを
設けることにより、分割導体パッド上にチップ部品が接
続されていなければ、回路パターンは切れ目により切断
状態のままになっており、電子部品実装後の回路機能試
験において電子回路は正常に動作せず、チップ部品の接
続有無を確実にチェックすることができる。
By providing a divided conductor pad with a cut in the middle of the circuit pattern, if no chip components are connected to the divided conductor pad, the circuit pattern remains disconnected due to the cut, and the circuit after electronic components are mounted. During a functional test, electronic circuits do not operate normally, and it is possible to reliably check whether chip components are connected or not.

〔実施例〕〔Example〕

以下図面に示す一実施例により本発明の要旨を具体的に
説明する. 第1図の平面図に示す印刷配線板は、第4図に示した回
路図に基づく電子回路を構成する.即ち、従来同様に電
源線回路パターンlとアース線回路パターン2を設け、
それぞれの回路パターン1.2の途中に1点鎖線で示す
チップ部品3、即ちチップコンデンサの電極3aを接続
する分割導体パッド5と導体バソド6を設けるとともに
、末端に2点鎖線で示すIC4のリ一ド4aを接続する
導体パッド7を設けているが、この電源線回路パターン
1の途中に設けた分割導体パソド5は輻0.2〜0.3
鶴程度の切れ目5aにより5−1.5−2に2分されて
おり、電源線回路パターン1を切断している点が異なる
. このように電源線回路パターン1の途中に電源線回路パ
ターンlを切断するような切れ目5aを有する分割導体
パッド5 (5−1.5−2)を設けることにより、い
ま、第2図の要部実装平面図に示すように分割導体パッ
ド5上にチップコンデンサ3の一方の電極3aが接続さ
れていれば、電源線回路パターンlは接続されたチップ
コンデンサ3の電極3aを介し分割導体パッド5、即ち
5−1 と5−2とをブリッジ接続するため導通状態に
あって電子部品実装後の回路機能試験において正常に回
路動作する。
The gist of the present invention will be specifically explained below with reference to an embodiment shown in the drawings. The printed wiring board shown in the plan view of FIG. 1 constitutes an electronic circuit based on the circuit diagram shown in FIG. That is, as in the conventional case, a power line circuit pattern 1 and a ground line circuit pattern 2 are provided,
In the middle of each circuit pattern 1.2, a divided conductor pad 5 and a conductor bathode 6 are provided to connect the chip component 3 shown by the dashed-dotted line, that is, the electrode 3a of the chip capacitor, and a lead for the IC 4 shown by the dashed-dotted line is provided at the end. A conductor pad 7 is provided to connect the power line circuit pattern 1, and the divided conductor pad 5 provided in the middle of the power line circuit pattern 1 has a radius of 0.2 to 0.3.
The difference is that it is divided into 5-1 and 5-2 by a crane-sized cut 5a, and the power line circuit pattern 1 is cut. By providing the divided conductor pad 5 (5-1.5-2) having the cut 5a that cuts the power line circuit pattern l in the middle of the power line circuit pattern 1 in this way, the main points shown in FIG. If one electrode 3a of the chip capacitor 3 is connected to the divided conductor pad 5 as shown in the partial mounting plan view, the power line circuit pattern l is connected to the divided conductor pad 5 through the electrode 3a of the connected chip capacitor 3. That is, since 5-1 and 5-2 are bridge-connected, they are in a conductive state and the circuit operates normally in a circuit function test after electronic components are mounted.

もし、第3図の要部実装平面図に示すようにチップコン
デンサ3が接続漏れ(接続不完全を含む)していれば、
分割導体パッド5−1.5−2間は開放のままとなり、
電源線回路パターンlは切断状態と1なり電子部品実装
後の回路機能試験において正常に回路動作しないことか
ら、例え目視検査でチップコンデンサ3が接続漏れを見
落としてもチップコンデンサ3の搭載有無を確実にチェ
ックすることができる. なお、上記説明の分割導体パッドは電源線に限らず信号
線に設けてもよく、この場合もチップ部品が接続されな
い限り電子回路は正常に回路動作・・できないことから
同様にチップ部品の接続漏れをチェックすることができ
る. また、上記説明はチップコンデンサで説明したが、チッ
プ抵抗などの他のチップ部品を接続する場合にも適用で
きることは言うまでもない。
If the chip capacitor 3 has a connection leak (including an incomplete connection) as shown in the main part mounting plan view of FIG.
The divided conductor pads 5-1 and 5-2 remain open,
Since the power line circuit pattern 1 is in a disconnected state and the circuit does not operate normally in the circuit function test after mounting the electronic components, it is possible to ensure that the chip capacitor 3 is mounted even if the chip capacitor 3 misses a connection during a visual inspection. You can check. Note that the split conductor pads described above may be provided not only for power lines but also for signal lines, and in this case as well, the electronic circuit cannot operate normally unless the chip components are connected, so there is a possibility that the chip components may not be connected properly. You can check. Further, although the above explanation has been made with respect to a chip capacitor, it goes without saying that it can also be applied to the case where other chip components such as a chip resistor are connected.

〔発明の効果〕〔Effect of the invention〕

以上、詳述したように本発明によれば、回路パターンの
途中に切れ目を有する分割導体パッドを設けることによ
り、チップ部品の搭載有無(あるいは接続不完全)を回
路機能試験において確実にチェックすることができ、目
視試験による見落としを補完することができるといった
産業上極めて有用な効果を発揮する。
As described in detail above, according to the present invention, by providing a divided conductor pad having a break in the middle of a circuit pattern, it is possible to reliably check whether a chip component is mounted (or whether the connection is incomplete) in a circuit function test. It has extremely useful effects in industry, such as being able to compensate for oversights caused by visual testing.

第4図は従来技術による一回路図、 第5図は第4図の印刷配線板の平面図である。Figure 4 is a circuit diagram according to the prior art. FIG. 5 is a plan view of the printed wiring board of FIG. 4.

図において、 lは回路パターン(電源線回路パターン)、3はチップ
部品(チップコンデンサ)、3aは電極、 5.5−1.5−2は分割導体バッド、5aは切れ目を
示す。
In the figure, l indicates a circuit pattern (power line circuit pattern), 3 indicates a chip component (chip capacitor), 3a indicates an electrode, 5.5-1.5-2 indicates a divided conductor pad, and 5a indicates a cut.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明による印刷配線板の一実施例の平面図、 第2図は第1図のチップ部品の接続状態を示す要部平面
図、 第3図は第1図のチップ部品の接続漏れの状態を示す要
部平面図、
FIG. 1 is a plan view of an embodiment of a printed wiring board according to the present invention, FIG. 2 is a plan view of essential parts showing the state of connection of the chip components shown in FIG. 1, and FIG. 3 is a plan view of the connection of the chip components shown in FIG. 1. A plan view of the main part showing the state of leakage,

Claims (1)

【特許請求の範囲】[Claims] チップ部品(3)の一電極(3a)を接続する切れ目(
5a)を有する分割導体パッド(5)を回路パターン(
1)の途中に設け、該切れ目(5a)により前記回路パ
ターン(1)を切断したことを特徴とする印刷配線板。
The cut connecting one electrode (3a) of the chip component (3) (
5a) with a circuit pattern (
A printed wiring board characterized in that the circuit pattern (1) is cut by the cut (5a) provided in the middle of the cut (5a).
JP1058228A 1989-03-09 1989-03-09 Printed wiring board Pending JPH02237091A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1058228A JPH02237091A (en) 1989-03-09 1989-03-09 Printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1058228A JPH02237091A (en) 1989-03-09 1989-03-09 Printed wiring board

Publications (1)

Publication Number Publication Date
JPH02237091A true JPH02237091A (en) 1990-09-19

Family

ID=13078224

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1058228A Pending JPH02237091A (en) 1989-03-09 1989-03-09 Printed wiring board

Country Status (1)

Country Link
JP (1) JPH02237091A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5425647A (en) * 1992-04-29 1995-06-20 Alliedsignal Inc. Split conductive pad for mounting components to a circuit board
WO1998016092A1 (en) * 1996-10-07 1998-04-16 Fuji Xerox Co., Ltd. Printed wiring board device
JPWO2011162005A1 (en) * 2010-06-24 2013-08-19 ボッシュ株式会社 Printed circuit board
JP2017083267A (en) * 2015-10-27 2017-05-18 Tdk株式会社 Electronic circuit and electronic apparatus

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5425647A (en) * 1992-04-29 1995-06-20 Alliedsignal Inc. Split conductive pad for mounting components to a circuit board
WO1998016092A1 (en) * 1996-10-07 1998-04-16 Fuji Xerox Co., Ltd. Printed wiring board device
US6166457A (en) * 1996-10-07 2000-12-26 Fuji Xerox Co., Ltd. Printed-circuit assembly
JPWO2011162005A1 (en) * 2010-06-24 2013-08-19 ボッシュ株式会社 Printed circuit board
JP2017083267A (en) * 2015-10-27 2017-05-18 Tdk株式会社 Electronic circuit and electronic apparatus

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