JPS6389940A - Program tracing circuit - Google Patents

Abstract

PURPOSE:To perform program tracing without stopping or interrupting a program in executing, or assembling a tracing program in a regulator program, by providing a trace stop control circuit, etc. CONSTITUTION:A microprocessor 1, when the start of a processing being instructed, outputs the value of a program counter, and a signal (a) to a bus 8. And the trace stop control circuit 4 outputs a start signal or a stop signal when the value set in an internal register coincides with an address inputted through the bus 8, and it is detected that the signal (a) is '1'. In this way, the start and the stop of the storage of a bit of trace information by a program counter sequential storing memory circuit 3 is controlled. Next, when a read signal from the processor 1 is inputted to a trace connect reading circuit 5, the bit of trace information stored in the circuit 3 is read out. In this way, it is possible to perform the program tracing without stopping the program in executing, and assembling the tracing program in the regular program.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a program trace circuit for a device using a microprocessor.

[Conventional technology]

Conventionally, when performing program tracing in a device using a microprocessor, an in-circuit emulator is used or a tracing program is incorporated into the normal program, and the program is traced using this tracing program. .

[Problem that the invention seeks to solve]

However, when performing program tracing using an in-circuit emulator, there is a problem in that it is necessary to control the microprocessor to interrupt or stop the program running state, and it is also necessary to incorporate the tracing program into the normal program. In this case, creating a program is troublesome and there is a risk of introducing errors.

The present invention solves the above-mentioned problems, and its purpose is to enable program tracing without stopping or interrupting a running program, or without incorporating a tracing program into a normal program. It's about doing.

[Means for solving problems]

In order to solve the above-mentioned problems, the present invention provides a memory circuit for sequentially storing trace information, a trace stop control circuit for stopping the storage of trace information by the memory circuit, in a device using a microprocessor. and a trace content reading circuit for reading trace information stored in the memory circuit.

[For production]

The trace information is sequentially stored by the memory circuit, the trace stop control circuit stops the memory circuit from storing the trace information, and the trace content reading circuit reads the trace information stored in the memory circuit.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention, which includes a microprocessor 1, a memory 2 in which programs, etc. executed by the microprocessor 1 are stored, and a count value of a program counter in the microprocessor 1 as trace information. A program counter sequential storage memory circuit 3 to be stored, a trace stop control circuit 4 that controls the start and stop of storage of trace information by the program counter sequential storage memory circuit 3, and a program counter sequential storage memory circuit 3 to store trace information. The trace content reading circuit 5 includes a trace content reading circuit 5 for reading out trace information, an interface section 6, and an external device 7.

In the figure, 8 is a bus consisting of a data bus, an address bus, and a control bus.

FIG. 2 is a block diagram showing an example of the configuration of the program counter sequential storage memory circuit 3, trace stop control circuit 4, trace content reading circuit 5, and interface section 6 shown in FIG.

The program counter sequential storage memory circuit 3 includes a memory circuit 31 that stores the count value of the program counter that is added from the microprocessor 1 via the bus 8, a counter 32 that sets the write address of the memory circuit 31 to jM7, and an AND gate 33. It is made up of spikes. The trace stop control circuit 4 has a register 41 in which the count value of the program counter at the time of starting tracing is set by the microprocessor 1 via the bus 8, and a register 41 in which the count value of the program counter at the time of stopping the trace is set by the microprocessor 1. The trace start/stop detection circuit 43 outputs a trace start signal and a trace stop signal C, an OR gate 44, 45, and a flip-flop 46. The trace content reading circuit 5 is comprised of a counter 51 for instructing the read address of the memory circuit 31, a three-state buffer 52, and an OR gate 53, and the interface section 6 is comprised of buffers 61-64.

Next, the operations shown in FIGS. 1 and 2 will be explained. In this embodiment, program tracing can be performed both by instructions from the external device 7 and by control of the microprocessor 1. First, a case where program tracing is performed by the control of the microprocessor 1 will be described.

In this case, the memory 2 stores, for example, as shown in FIG. 3, a program A that performs a trace start process, a program B that performs a process to be traced, and a program C that performs a trace information read process. . still,
Program A includes an instruction to set the count value of the program counter in the register 41 to start the program trace, and an instruction to set the count value of the program counter in the register 42 to end the program trace.

When the microprocessor 1 is instructed to start processing, it outputs the value of the program counter to the bus 8, sequentially reads out the instructions, etc. in the programs A, B, and C from the memory 2, and executes them. Each time the microprocessor 1 reads one instruction from the memory 2, it outputs the count value of the program counter to the bus 8 and sets its output signal a to "1".

By reading the program A, the microprocessor sensor 1 sets the count value of the program counter that starts the program trace in the register 4I, and also writes the count value of the program counter that ends the program trace in the register 42.

After the execution of program A is completed, microprocessor l executes the processing of program B. The trace start/stop detection circuit 43 in the trace stop control circuit 4 detects that the value stored in the register 41 matches the address applied via the bus 8, and the output signal a of the microprocessor 1 is "1". If it is detected that this is the case, the start signal is set to "1". Start signal Suga “1”
Then, the flip-flop 46 is reset and its output becomes I'', and the AND gate 33 is turned on.As a result, the signal a from the microprocessor 1
will be added to the memory circuit 31 and counter 32.

The counter 32 increments its count value by 1 every time the signal a applied via the AND gate 33 becomes 1'', and when the count value matches the final address of the memory circuit 31, the signal a becomes ``1''. and flip-flop 4
When the Q output of 6 becomes "1", it is reset and the count value is returned to the start address of the memory circuit 31. Further, the memory circuit 31 stores the address on the bus 8 (the count value of the program counter) at the address indicated by the counter 32 when the signal a applied through the AND gate 33 becomes 1''. , the start signal becomes 11", so that the memory circuit 3
1, the count values of the program counter are sequentially stored.

After that, when it is detected that the value written in the register 42 and the address added via the bus 8 match and that the output signal a of the microprocessor 1 is 1'', the trace stop control circuit 4 The trace start/stop detection circuit 43 in the
”.When the stop signal C becomes “1”,
Flip-flop 46 is set, and its Q and Q outputs become "1" and "O", respectively. When the n output becomes "0", the AND gate 33 is turned off, and therefore writing of the count value of the program counter to the memory circuit 31 is stopped. Further, when the Q output becomes 1'', the count value of the counter 32 is loaded into the counter 51 in the trace content reading circuit 5, and the counter 32 is reset.

When execution of program B is completed, microprocessor 1 executes program C and reads trace information stored in memory circuit 31. The microprocessor 1 reads trace information stored in the memory circuit 31 by applying a read signal d to the trace content read circuit 5.

The read signal d is sent to the memory circuit 31 via the OR gate 53.
and the counter 51, the memory circuit 31 outputs the data stored at the address indicated by the counter 51 when the read signal d is added, and the counter 51 increases its count value by +1 when the read signal d is added. do. Therefore, as shown in FIG. 4, trace information is sequentially read out from the memory circuit 31 starting from the next address where the program trace was stopped, and the read trace information is transferred to the microprocessor via the three-state buffer 52. Added to 1.

Next, the operation when instructing to read the program trace and trace information from the external bag W7 will be explained.

When the start signal e from the external device 7 becomes 1 while the microprocessor 1 is running, the flip-flop 46 in the trace stop control circuit 4 is reset, its n output becomes 1, and the AND gate 33 is turned on. As a result, the signal a from the microprocessor 1 is passed through the AND gate 33 to the memory circuit 31 and the counter 3.
2, the trace information is sequentially stored in the memory circuit 31 in the same way as described above. After this, when the stop signal f from the external bag W7 becomes 1'', the flip-flop 46 is set and its Q and Q outputs are each ``1''.

The value becomes "0", and writing of trace information to the memory circuit 31 is stopped, and the count value of the counter 32 is loaded to the counter 51, as described above. Therefore, after the start signal e becomes "1", the stop signal f becomes "l".
The count value of the program counter up to this point is stored in the memory circuit 31 as trace information.

When reading the trace information stored in the memory circuit 31, the external device 7 outputs a read signal g.

As a result, in the same manner as described above, trace information is sequentially read from the next address where program tracing was stopped, and the read trace information is added to the external device 7 via the three-state buffer 52 and the buffer 63.

In the above embodiment, the count value of the program counter is stored in the memory circuit 31 as trace information, but the present invention is not limited to this.

〔Effect of the invention〕

As described above, the present invention includes a memory circuit that sequentially stores trace information, a trace stop control circuit that stops the memory circuit from storing trace information, and a trace content readout circuit that reads the trace information stored in the memory circuit. Since the circuit is equipped with a circuit, the program usually includes trace buffers, 61 to 64...buffers.

This has the advantage that program tracing can be performed without incorporating a program and without stopping or interrupting a running program.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a memory circuit 3 for sequentially storing a program counter. Trace stop control circuit 4. FIG. 3 is a block diagram showing an example of the configuration of the trace content reading circuit 5 and the interface section 6; FIG. 3 is a diagram showing an example of a program; and FIG. 4 is an explanatory diagram of trace information writing and reading operations.

Claims (1)

[Scope of Claim] A device using a microprocessor, comprising: a memory circuit that sequentially stores trace information; a trace stop control circuit that stops the memory circuit from storing trace information; A program trace circuit comprising: a trace content readout circuit for reading out trace information contained in a program.