JPS6384131A - Device for inspecting semiconductor device - Google Patents

Abstract

PURPOSE:To separate a predetermined semiconductor from a semiconductor chip thereby to stabilize a measurement by providing switch mens on a probe card. CONSTITUTION:When a lead to the electrode 6c of a semiconductor chip 5 is desired to be shortened since the electrode 6c reduces an induction noise at the input terminal of an amplifier, a relay 13 is provided between a probe 3c to be contacted with the electrode 6c and a terminal 3c, a predetermined voltage is applied between control terminals 14 and 15 to deenergize the relay 13. A probe card 1 in which the mounting position of the relay 13 is provided according to the type of the chip is prepared. According to this structure, the semiconductor chip can be stably measured.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an inspection device used in a probe inspection process for semiconductor devices.

2. Description of the Related Art In probe testing of semiconductor devices, a testing device called a probe card is used, which is equipped with a probe for connecting an electrode on a semiconductor chip to be measured and the testing device. FIG. 2 is a structural diagram showing an example of the probe card.

In FIG. 2, 1 is an insulator substrate (hereinafter referred to as the probe card body), 2 is a probe attached to the back surface of the probe card body 1, and 3 is a plurality of probes formed at one end of the probe card body 1. An electrical terminal; 4 is a wiring layer connecting the probe 2 and the electrical terminal 3; 5 is a semiconductor chip to be measured; 6 is an electrode provided on the surface of the semiconductor chip 5 to be measured; 7 is an electrode 6 and the probe 2; This window is used to confirm whether or not the contact is correct.

The probe card is connected to a probe testing tester via a connecting means connected to the electrical terminal 3 of the probe card, thereby configuring a measurement system. The overall configuration of this measurement system is shown in FIG. In FIG. 3, 8 is a probe card configured as described above, 9 is a tester for probe inspection,
10 is a lead wire which is a connection means for connecting the probe card 8 and the probe tester 9; 11 is various power supplies and voltmeters inside the probe tester 9;
A module such as an ammeter, and reference numeral 12 are switching means such as a relay for electrically connecting and disconnecting the module 11 and the lead wire 10.

In the probe inspection measurement system configured as above,
The operation during inspection will be explained below.

For example, when trying to measure the current flowing when a constant voltage is applied between the electrodes 6a and 6b on the semiconductor chip 5 to be measured, the operation is as follows.

A voltage source 111 and an ammeter 112, which are components of the module 11, are connected in series as shown in FIG. Contacts 12a and 12b of relay 12 are then closed and voltage source 1
11 is input to the probe card 8 through lead wires 10a and 10b connected to these contacts, and electrical terminals 3a and 3b of the probe card 8 to which the lead wires 10a and 10b are connected, respectively. The voltage thus input is further applied to the electrodes 6 and 6b of the semiconductor chip to be measured through the wiring layers 4a and 4b of the probe card and the probes 2a and 2b shown in FIG. A current flows through the circuit thus formed, and this current is measured by an ammeter 112.

Problems to be Solved by the Invention In the configuration of the probe inspection and measurement system as described above, the electrical connection and disconnection between the semiconductor chip 6 to be measured and the probe inspection tester 9 is performed by a relay 12 inside the tester. In this case, even if the relay 12 is open, the long lead wire 10 remains connected to the semiconductor chip under test 5, and inductive noise is applied to the electrode 6 on the semiconductor chip under test to which the lead wire 10 is connected. It becomes easier. Furthermore, the distributed capacitance of the lead wire 1o is also added to the electrode 6. Therefore, there is a problem in that it is difficult to accurately measure the electrical characteristics of the semiconductor chip 5 to be measured.

Means for Solving the Problems The present invention has been made to solve the above problems, and includes a plurality of probes for probe testing, a substrate made of an insulator to which these probes are attached, and this substrate. a plurality of electrical terminals provided on the substrate;
It comprises a wiring layer for connecting the plurality of probes and a plurality of electrical terminals, and a switch means for electrically connecting and disconnecting the semiconductor chip to be measured and the probe testing tester on the substrate. be.

According to this configuration, when the switch means is open, only the wiring layer portion between the switch means and the probe and the probe are connected to the electrode on the semiconductor chip to be measured.
The length of the conductor connected to the electrode is much shorter than before.

Embodiment FIG. 1 is a structural diagram showing an embodiment of a semiconductor device inspection apparatus according to the present invention. In FIG. 1, 13 is a relay placed on the probe card body 1, 14.15
1 is an electrical terminal for controlling the relay 13, and 16 is a wiring layer for connecting the relay 13 and the electrical terminals 14 and 16. Note that the elements numbered 1 to 7 are the same as the elements numbered the same in FIG.

The semiconductor device inspection apparatus of the present invention configured as described above will be described below. For example, among the electrodes of the semiconductor chip 5 to be measured, the electrode 6c is the input terminal of an amplifier with a high voltage gain, and therefore a lead wire etc. is added to the electrode 6c in order to reduce the influence of induced noise as much as possible. When it is necessary to make the length of the conductor as short as possible,
As shown in the figure, a relay 13 is installed between the probe 2c in contact with the electrode 6c and the electrical terminal 3c, and the relay 13 is opened by applying a constant voltage between the control electrical terminals 14 and 15. The purpose is achieved by achieving the state. That is, when the relay 13 is opened, the lead wire, which is usually several meters long and is connected between the electrical terminal 3c and the probe tester, is separated from the electrode 6c. Therefore, it is possible to eliminate the adverse effects of induced noise.

Note that if the type of semiconductor chip 5 to be measured differs, the electrodes to which the length of conductors such as lead wires to be added must be kept as short as possible will also change, but the length of the conductor such as an attached lead wire must be kept as short as possible. Then, the probe power cord body 1 in which the mounting position of the relay 16 is set is prepared.

Further, although a relay is used as the switch means in the above embodiment, it goes without saying that something other than a relay may be used.

Effects of the Invention As described above, according to the present invention, a predetermined conductor can be electrically disconnected from a semiconductor chip under test by means of a switch installed on a probe card, thereby reducing induced noise. Addition of applied or distributed isocapacitance is eliminated; their negative influence on the measurement is eliminated. Therefore, stable measurement of the semiconductor chip to be measured can be achieved.

[Brief explanation of the drawing]

FIG. 1 is a structural diagram showing a semiconductor device testing device according to an embodiment of the present invention, FIG. 2 is a structural diagram showing an example of a conventional semiconductor device testing device, and FIG. 3 is a configuration diagram of a probe testing system. It is. DESCRIPTION OF SYMBOLS 1...Insulator substrate, 2...Probe, 3...Electrical terminal, 4--Conductor wire, 5
... Semiconductor chip to be measured, 6... Electrode, 7.
... window, 13 ... relay (switch means), 14.15 ... electrical terminal for controlling relay,
16... Conductor. Name of agent: Patent attorney Toshio Nakao and 1 other person7-
--Insulator substrate 2- Broke (bare furnace) 3-Electrical terminal 4-Wiring layer 5-Semiconductor chip to be measured-1Ja 7-Relay 1 Figure 13-Relay (Stina 7,000-handed deception) ta, ts- -Relay control terminal tb--Wiring layer @2 diagram

Claims (1)

[Claims] A plurality of probes to be brought into contact with electrodes on a semiconductor chip to be measured, a substrate made of an insulator to which the plurality of probes are attached, and a plurality of electrical terminals provided on the substrate, and the plurality of probes. and a predetermined probe selected from each of the plurality of electrical terminals and the electrical terminal are connected to a wiring layer provided on the substrate via a switch means.