JPH05198633A - Prober for semiconductor wafer - Google Patents

Abstract

PURPOSE:To control a noise caused by impedance, by shortening a conductive path when a voltage is applied to the rear of a semiconductor wafer. CONSTITUTION:An electrode plate 11 supplied from a DUT board 1 is installed on the bottom of the DUT board 1. pogo pins 15, which are electrically connected to a chuck top 4 and are connectably installed to the electrode plate 11, are provided on the side of the chuck top 4. Since a potential is applied on the chuck top 4 by contacting the pogo pins 15 with the electrode plate 11, a short, conductive path between the chuck top 4 and a power source is obtained. Thus, the potential is applied on the chuck top 4 through the short wiring and a noise caused by impedance is controlled.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer prober used for inspecting, testing, etc., an element formed on a semiconductor wafer.

[0002]

2. Description of the Related Art A conventional semiconductor wafer prober of this type is constructed as shown in FIG. FIG. 8 is a side view showing a conventional semiconductor wafer prober. In FIG. 1, reference numeral 1 is a DUT board as a test circuit board on which a test circuit is mounted, and 2 is a probe card provided on the DUT board 1. In addition, 2a is a probe pin provided upright on the probe card 2.

Reference numeral 3 denotes a semiconductor wafer (hereinafter, simply referred to as a wafer), on which an element under test (not shown) is formed. A chuck top 4 serves as a wafer chuck on which the wafer 3 is placed and conveyed. Reference numeral 4 a denotes a connection terminal electrically connected to the chuck top 4, and the connection terminal 4 a is connected to the connection connector 6 via the cable 5. The connection connector 6 is fixed to the housing of the device.

Next, a procedure for testing the wafer 3 by the conventional semiconductor wafer prober thus constructed will be described. First, the wafer 3 is placed and fixed on the chuck top 4, and the chuck top 4 is moved to position the wafer 3 directly below the probe card 2.

After that, the chuck top 4 is raised to bring the probe pin 2a into contact with the device under test of the wafer 3.
In this state, the device under test and the DUT board 1 are electrically connected via the probe card 2.

After the positioning operation is completed in this way, D
Various signals and voltages are applied by the UT board 1 to perform the test. When it is necessary to apply a potential to the wafer 3 during the test, a voltage source is connected to the connector 6. In this way, the cable 5 and the connection terminal 4a
Then, the voltage is applied to the wafer 3 via the chuck top 4. The test is performed in this manner.

[0007]

However, since the conventional semiconductor wafer prober is constructed as described above, when a potential is applied to the chuck top 4, a long (about 70 cm) cable 5 is applied from the outside of the prober. The electric potential is applied by applying the electric potential, and noise may be superimposed as the impedance increases. Further, with the recent increase in the speed of LSI elements, this noise may increase and affect the operation of the device under test.

[0008]

A prober for a semiconductor wafer according to the present invention is provided with a wafer backside power supply electrode for supplying power from the test circuit board to a portion of the test circuit board facing the wafer chuck. On the side, a contactor that is electrically connected to the wafer chuck and that is provided so as to be able to come into contact with and separate from the wafer backside power supply electrode is disposed.

[0009]

The potential is applied to the wafer chuck by bringing the contactor into contact with the wafer back surface electrode, so that the conduction path between the wafer chuck and the power supply can be short.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to FIGS. 1 is a sectional view showing a prober for semiconductor wafers according to the present invention, FIG. 2 is an enlarged sectional view showing a connecting portion between a wafer chuck and a contactor, and FIG. 3 is a test circuit board and a wafer backside power supply electrode. It is sectional drawing which expands and shows the connection part of.

FIG. 4 is a cross-sectional view for explaining the operation of the prober for semiconductor wafers according to the present invention. FIG. 4 (a) shows a state in which the wafer is transferred directly under the probe card, and FIG. 4 (b) shows it. The state where the contactor is brought into contact with the wafer backside power supply electrode is shown, and FIG. 7C shows the state where the wafer is brought into contact with the probe pin. In these figures, the same or equivalent members as those described in FIG. 8 are designated by the same reference numerals and detailed description thereof will be omitted.

In these figures, 11 is an electrode plate as a wafer backside power supply electrode for applying a voltage to the backside of the wafer 3, and this electrode plate 11 is fixed to the lower surface side of the DUT board 1 and is a cable. It is connected to the DUT board 1 via 12. The electrode plate 11 is a DUT.
It is connected to a power supply line (not shown) for the back surface of the wafer of the board 1.

Reference numeral 13 denotes a contact ring arranged below the chuck top 4. An outer peripheral portion of the contact ring 13 extends to the outer peripheral side of the chuck top 4, and is connected to an elevating device (not shown) so as to be vertically movable. Also,
The contact ring 13 is electrically connected to the chuck top 4 via a cable 14.

A pogo pin 15 as a contactor is movably supported in the vertical direction at a position just below the electrode plate 11 on the outer peripheral portion of the contact ring 13. A plurality of pogo pins 15 are provided. Further, a spring 15a is interposed between each pogo pin 15 and the contact ring 13, and each pogo pin 15 is biased upward by this spring 15a.

The procedure for testing the wafer 3 using the semiconductor wafer prober according to the present invention having the above-described structure will be described. First, the electrode plate 11 is connected to the wafer backside power supply line of the DUT board 1, and the entire electrode plate 11 is set to a predetermined potential. Then, as shown in FIG. 4A, the wafer 3 is mounted and fixed on the chuck top 4 in the same manner as in the conventional case, and is positioned directly below the probe card 2.

After that, as shown in FIG. 4B, the contact ring 13 is raised to bring the pogo pin 15 into contact with the electrode plate 11 from below. As a result, the potential of the chuck top 4 becomes the same as that of the electrode plate 11, and the voltage is applied to the wafer 3.

Next, as shown in FIG. 4 (c), the chuck top 4 is raised and the device under test (not shown) on the wafer 3 is tested.
To the probe pin 2a of the probe card 2.
In this state, a predetermined voltage and signal are applied from the DUT board 1 to perform the test.

In this embodiment, the wafer 3 is brought into contact with the probe pin 2a after the pogo pin 15 is brought into contact with the electrode plate 11. However, conversely, the wafer 3 is brought into contact with the probe pin 2a. After the pogo pin 15
It is also possible to contact 1. It is also possible to contact them at the same time.

Therefore, since the electric potential is applied to the chuck top 4 by bringing the pogo pin 15 into contact with the electrode plate 11, the conduction path between the chuck top 4 and the wafer backside power supply can be short.

Although the pogo pins 15 are used as the contacts in this embodiment, they may be ring-shaped as shown in FIG. 5 as long as they can make sufficient contact. FIG. 5 is a sectional view showing another example of the contactor. In the figure, the same or equivalent members as those described in FIGS. 1 to 4 are designated by the same reference numerals, and detailed description thereof will be omitted.

In FIG. 5, 21 is a ring as a contactor, and 22 is a spring for urging the ring 21 upward.

In the embodiment shown in FIGS. 1 to 4, the chuck top 4 and the contact ring 13 are independently moved up and down, but when the order of applying the voltage sources to the wafer 3 need not be particularly considered. The chuck top and the contact ring may be integrated as shown in FIG.

FIG. 6 is a sectional view showing another embodiment of the prober for semiconductor wafers according to the present invention. In FIG.
The same or equivalent members as those described in FIG. 4 are designated by the same reference numerals, and detailed description thereof will be omitted. The chuck top 4 shown in FIG. 6 has a pogo pin 15 mounted so as to be vertically movable.

In each of the above-mentioned examples, the electrode plate 11 is used only for contact with the contactor, but it may be constructed as shown in FIG. 7A and 7B are views showing another example of the electrode plate. FIG. 7A shows a state before the DUT board is attached, FIG. 7B shows a state after the DUT board is attached, and FIG. The sectional view of the relay terminal for electrode plates is shown. In these drawings, the same or equivalent members as those described in FIGS. 1 to 4 are designated by the same reference numerals and detailed description thereof will be omitted.

In FIGS. 7A to 7C, 31 is a DU
A relay terminal for connecting the probe card 2 to the T board 1. The relay terminal 31 is fixed through the electrode plate 11, and is fitted into the insulating cylinder 32 so as to be vertically movable in the insulating cylinder 32. It has a pogo pin 33. Further, the pogo pins 33 are vertically mounted on the insulating cylinder 32, and the pogo pins 33 are mechanically and electrically connected to each other by a spring 34 made of a conductive material.

With this structure, the electrode plate 11 can prevent the parallelism between the probe card 2 and the wafer due to the bending of the DUT board 1.

[0027]

As described above, the prober for semiconductor wafers according to the present invention is provided with a wafer backside power supply electrode to which power is supplied from the test circuit board at a portion of the test circuit board facing the wafer chuck. On the chuck side, since the contactor electrically connected to the wafer chuck and provided so as to come in contact with and separate from the wafer backside power supply electrode is disposed, the wafer chuck can be contacted with the wafer backside electrode. Since a potential is applied to the wafer chuck, the conduction path between the wafer chuck and the power supply can be short.

Therefore, it is possible to apply a potential to the wafer chuck with a short wiring, suppress noise due to impedance, and perform a highly accurate test.

[Brief description of drawings]

FIG. 1 is a sectional view showing a prober for semiconductor wafers according to the present invention.

FIG. 2 is an enlarged sectional view showing a connecting portion between a wafer chuck and a contact.

FIG. 3 is an enlarged cross-sectional view showing a connection portion between a test circuit board and a wafer backside power supply electrode.

FIG. 4 is a cross-sectional view for explaining the operation of the prober for semiconductor wafers according to the present invention, in which FIG. 4 (a) shows a state in which the wafer is conveyed directly below the probe card, and FIG. Shows the state of contacting the wafer backside power supply electrode,
FIG. 3C shows a state where the wafer is in contact with the probe pin.

FIG. 5 is a cross-sectional view showing another example of the contactor.

FIG. 6 is a sectional view showing another embodiment of the prober for semiconductor wafers according to the present invention.

FIG. 7 is a diagram showing another example of the electrode plate, in which FIG.
The state before attachment of the T board is shown, FIG. 6B shows the state after attachment of the DUT board, and FIG.

FIG. 8 is a side view showing a conventional semiconductor wafer prober.

[Explanation of reference numerals] 1 DUT board 2 probe card 2a probe pin 3 semiconductor wafer 4 chuck top 11 electrode plate 13 contact ring 15 pogo pin 21 ring

Claims (1)

[Claims] 1. A test circuit board having a probe pin, and a wafer chuck that is provided so as to be movable back and forth with respect to the test circuit board and presses a semiconductor wafer against the probe pin. In a semiconductor wafer prober that applies voltage to the back surface,
A wafer backside power supply electrode for supplying power from the test circuit board is provided at a portion of the test circuit board facing the wafer chuck, and the wafer backside power supply electrode is electrically connected to the wafer chuck and for the wafer backside power supply. A prober for a semiconductor wafer, characterized in that a contactor is provided so as to be able to come into contact with and separate from an electrode.