JPS6372114A - Manufacture of memory cell - Google Patents

Abstract

PURPOSE:To make depths of diffused layers on sidewalls and on the bottom of a trench equal and prevent leakage due to aftertreatment with heat from developing between two trenches that are adjacent each other by causing a wafer to be rotated in sequence in a state where ion beams of impurities are slant at a prescribed angle to the sidewalls of the trench and performing ion implantation with a high energy of 100 keV or above. CONSTITUTION:A trench 3 of approximately 1.0X1.0mum<2> and at a depth of 4mum is formed in a single crystal silicon substrate 2 with a dry etching process. What is more, ions such as of As are implanted by causing ion beams 6 to be rotated at an accelerated energy of around 100 keV as well as a dose of around 1X10<15> cm<-2> in a state where the ion beams are slant at an angle of inclination x of around 10 deg. to the sidewall of the trench 3. Subsequently, an annealing is carried out and in such a case depths of diffused layers come to 1000-2000 Angstrom at the sidewall part and 1500-2500 Angstrom at a bottom part, resulting in the formation of a nearly uniform depth of the diffused layers 1. Thus, such an application of ion implantation where its density controllability is highly efficient makes it possible to form the reproducible and uniform diffused layers in the trench.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of manufacturing a trench type memory cell using ion implantation.

Conventional technology In memory devices with an integration density of 4 megabits dynamic RAM or higher, malfunctions (soft errors) occur due to radiation such as alpha rays entering and charge escaping.
As a countermeasure against this, it is necessary to increase the capacity of the cell capacitor. However, planar capacitors require a large chip area, which poses a problem in increasing the degree of integration.

Therefore, trench capacitor technology is essential. In a trench capacitor, if a uniform impurity diffusion layer is not formed on the trench sidewalls, defects such as leakage between adjacent trenches may occur. Conventionally, vapor phase diffusion and solid phase diffusion have been studied as methods for doping trench sidewalls in trench capacitors. In the vapor phase diffusion method, as shown in FIG. 3a, a trench 3 is formed in a semiconductor substrate 2 by a dry etching process, and then P and As are formed in a high temperature atmosphere as shown in the same figure.

This is a method of flowing a B-based gas 4 and diffusing it from the vapor phase into the semiconductor substrate 2 to form the impurity diffusion layer 1.

In the solid phase diffusion method, as shown in FIG. 4a, after forming a trench 3 in a semiconductor substrate 2 by a dry etching process,
As shown in the same figure, 1) Si-based glass 5 containing impurities such as P, As, and B is uniformly formed inside the wrench, and then, as shown in C of the same figure, Si is In this method, the impurity diffusion layer 1 is formed by diffusing impurity from a solid phase to the sidewall of a trench through a base glass.

Problems to be Solved by the Invention In trench capacitors, an important technique is to implant impurities into trench sidewalls with good controllability. In particular, the problem of concentration control is important.

The vapor phase diffusion method has difficulty in uniformly flowing the impurity-containing gas 4 to the bottom of the trench.

The solid phase diffusion method has a difficulty in that there are variations in the impurity concentration in the St-based glass 5. Furthermore, there are problems in terms of the process, such as the need for new dedicated equipment and the complexity. The ion implantation method has a simple manufacturing process, but under normal implantation conditions for a planar type, as shown in FIG. is injected in large quantities. In actual memory devices, trenches are located close to each other, so if the shape of the deep impurity diffusion layer 1 at the bottom of the trench is as shown in Figure 2, impurity diffusion will occur during the subsequent heat treatment process. There are problems such as leakage in trenches between adjacent cells.

Means for Solving the Problem In order to solve this problem, the present invention sequentially rotates the wafer while tilting the impurity ion beam at a predetermined angle with respect to the trench sidewall, and implants the impurity ion beam at a high energy of 100 KeV or more. Use methods.

Effect By implanting at a high energy of 100 KeV or more, the trench sidewalls are made amorphous by the impurity ions due to the high energy of the ion beam, the scattering effect on the sidewalls is significantly reduced, and the amount of implantation to the trench bottom is reduced. Decrease. This allows the depth of the diffusion layer to be comparable between the sidewalls and the bottom of the trench, eliminating leakage between adjacent trenches due to subsequent heat treatment.

Embodiment A method of manufacturing a trench type memory cell by ion implantation according to the present invention will be explained with reference to an embodiment shown in FIG. 1 on the single crystal silicon substrate 2. A trench 3 with a depth of about 4 μm is formed using a dry etching process using the OXl and Oμ doors, and the ion beam 6 is set at an inclination angle of 100 to the side wall of the trench.
In a tilted state, the acceleration energy is about 100 KeV, and the dose is 1×10 C! As ions are implanted by rotating the wafer by 90' four times at an angle of about n. At the bottom, there are 1,000 to 2,500 people, and it is possible to obtain a diffusion layer 1 of approximately uniform depth as shown in FIG. Further, even in a cell capacitor of 4M DRAM level, there is no leakage between adjacent trenches, and good results can be obtained in terms of noise and noise.

Effects of the Invention As described above, according to the present invention, a uniform diffusion layer can be formed inside a trench with good reproducibility by using ion implantation, which is the method with the best concentration controllability. This is effective as a method for manufacturing a trench capacitor that contributes to high integration without leakage between adjacent cells.

[Brief explanation of the drawing]

Figure 1 is a cross-sectional view when the sidewall of a trench capacitor according to the present invention is doped, Figure 2 is a cross-sectional view when the sidewall of the trench is doped using conventional ion implantation energy, and Figure 3 is a gas-phase diffusion FIG. 4 is a step-by-step sectional view of a method for doping impurities into a trench by a solid-phase diffusion method. DESCRIPTION OF SYMBOLS 1... Impurity diffusion layer, 2... Semiconductor substrate, 3... Trench, 4... Impurity-based gas, 5... Si-based Glass, 6...Ion beam, 7...Scattered beam. Name of agent: Patent attorney Toshio Nakao and one other person G-
4χ Bin-4 6---In λ int:'< Figure 3 ``-+ to *T-, °°''

Claims (1)

[Claims] After forming a trench on the substrate surface, the ion beam is tilted at a predetermined angle with respect to the trench sidewall, and the substrate is sequentially rotated to apply 100 KeV to the trench sidewall.
A method for manufacturing a memory cell characterized by implanting with high energy as described above.