JPS636892B2 - - Google Patents

Info

Publication number
JPS636892B2
JPS636892B2 JP14670482A JP14670482A JPS636892B2 JP S636892 B2 JPS636892 B2 JP S636892B2 JP 14670482 A JP14670482 A JP 14670482A JP 14670482 A JP14670482 A JP 14670482A JP S636892 B2 JPS636892 B2 JP S636892B2
Authority
JP
Japan
Prior art keywords
processor
bus
register
signal line
inter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP14670482A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5936862A (ja
Inventor
Satoru Fukami
Taichi Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP14670482A priority Critical patent/JPS5936862A/ja
Publication of JPS5936862A publication Critical patent/JPS5936862A/ja
Publication of JPS636892B2 publication Critical patent/JPS636892B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/364—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Multi Processors (AREA)
JP14670482A 1982-08-24 1982-08-24 プロセツサ間通信方式 Granted JPS5936862A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14670482A JPS5936862A (ja) 1982-08-24 1982-08-24 プロセツサ間通信方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14670482A JPS5936862A (ja) 1982-08-24 1982-08-24 プロセツサ間通信方式

Publications (2)

Publication Number Publication Date
JPS5936862A JPS5936862A (ja) 1984-02-29
JPS636892B2 true JPS636892B2 (enrdf_load_stackoverflow) 1988-02-12

Family

ID=15413654

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14670482A Granted JPS5936862A (ja) 1982-08-24 1982-08-24 プロセツサ間通信方式

Country Status (1)

Country Link
JP (1) JPS5936862A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH027151A (ja) * 1988-06-27 1990-01-11 Nitsuko Corp マルチプロセッサシステム

Also Published As

Publication number Publication date
JPS5936862A (ja) 1984-02-29

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