JPS6364391A - Method of high density mounting of electronic parts - Google Patents

Method of high density mounting of electronic parts

Info

Publication number
JPS6364391A
JPS6364391A JP20829386A JP20829386A JPS6364391A JP S6364391 A JPS6364391 A JP S6364391A JP 20829386 A JP20829386 A JP 20829386A JP 20829386 A JP20829386 A JP 20829386A JP S6364391 A JPS6364391 A JP S6364391A
Authority
JP
Japan
Prior art keywords
board
electronic component
integrated circuit
electronic components
density mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20829386A
Other languages
Japanese (ja)
Inventor
和田 富夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP20829386A priority Critical patent/JPS6364391A/en
Publication of JPS6364391A publication Critical patent/JPS6364391A/en
Pending legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、各種電子装置、制御機器等に使用されている
電子部品の高密度実装方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method for high-density packaging of electronic components used in various electronic devices, control equipment, and the like.

従来の技術 従来の電子部品の実装方法について第3図を参照しなが
ら説明すると、回路基板(プリント基板)101の孔1
02にデュアルインラインパッケージ(DIP)に収納
された集積回路素子(以下、ICと称す)103の端子
10.1を挿通させる。これと共にチップタイプの電子
部品105は回路基板101に接着剤106により接着
し、リード付電子部品107ばそのリード108を回路
基板101の孔109に挿通させる。然る後、IC10
3の端子104と、電子部品105の電極110と、電
子部品107のリード108を回路基板101に半田づ
け111により接続する。
2. Description of the Related Art A conventional electronic component mounting method will be explained with reference to FIG.
A terminal 10.1 of an integrated circuit element (hereinafter referred to as an IC) 103 housed in a dual in-line package (DIP) is inserted into the terminal 02. At the same time, the chip type electronic component 105 is bonded to the circuit board 101 with an adhesive 106, and the leads 108 of the electronic component 107 with leads are inserted into the holes 109 of the circuit board 101. After that, IC10
The terminal 104 of No. 3, the electrode 110 of the electronic component 105, and the lead 108 of the electronic component 107 are connected to the circuit board 101 by soldering 111.

発明が解決しようとする問題点 しかしながら、上記従来例においては、IC103を含
めたすべての電子部品が回路基板1.01上に平面的に
配列されているため、電子部品の高密度実装を得ようと
すると、基板面積が広くなり、電子装置等の小型化を図
ることができないという問題があった。
Problems to be Solved by the Invention However, in the above conventional example, all the electronic components including the IC 103 are arranged flat on the circuit board 1.01, so it is difficult to obtain high-density mounting of the electronic components. In this case, there is a problem that the substrate area becomes large and it is not possible to miniaturize electronic devices or the like.

そこで、本発明は、このような従来の問題を解決するも
のであり、電子部品を低コストで高密度に実装すること
ができ、また平面上で占める回路基板の面積を縮小して
電子装置等の小型化を図ることができ、また配線を容易
に行うことがてき、さらには高機能化を図ることができ
るようにした電子部品の高密度実装方法を提供しようと
するものである。
Therefore, the present invention solves these conventional problems, and allows electronic components to be mounted at low cost and with high density, and also reduces the area occupied by a circuit board on a plane, thereby allowing electronic devices, etc. It is an object of the present invention to provide a high-density mounting method for electronic components, which makes it possible to reduce the size of electronic components, facilitate wiring, and improve functionality.

問題点を解決するだめの手段 そして上記問題点を解決するための本発明の技術的な手
段は、集積回路素子の外部電極の一部を他の回路と接続
しない電子部品とのみ接続し、集積回路素子の残る外部
電極を回路基板;二接続するものである。
Means for solving the problems and technical means of the present invention for solving the above problems are to connect a part of the external electrode of an integrated circuit element only to an electronic component that is not connected to other circuits, and to The remaining external electrodes of the circuit elements are connected to the circuit board;

作    用 本発明は、上記構成により、集積回路素子の外部電極を
そのまま利用して集積回路素子の周辺電子部品を集積回
路素子の面積内に納めることができるので、低コストで
回路基板面積を縮小することが可能となり、電子装置等
の小型化を図ることができ、また電子部品の高密度実装
を行うことができるので、高機能化を図ることができる
。ここで、全体の高さが高くなるが、これは電子装置全
体の高さに影響を及ぼすことは少ないので問題とはなら
ない。
According to the present invention, with the above configuration, the peripheral electronic components of the integrated circuit element can be accommodated within the area of the integrated circuit element by using the external electrodes of the integrated circuit element as they are, so that the area of the circuit board can be reduced at low cost. This makes it possible to miniaturize electronic devices and the like, and also enables high-density mounting of electronic components, resulting in higher functionality. Although the overall height is increased here, this does not pose a problem because it has little effect on the overall height of the electronic device.

実施例 以下、本発明の実施例について図面を参照しながら説明
する。
EXAMPLES Hereinafter, examples of the present invention will be described with reference to the drawings.

先ず、本発明の第1実施例について説明する。First, a first embodiment of the present invention will be described.

第1図において、1はプリント基板よりなる主基板(回
路基板)、2は集積回路素子(以下、ICと称す)、3
はチップ型の電子部品、4はリード付電子部品、5はサ
ブ基板で、プリント基板等よりなり、IC2とほぼ同じ
面積に形成されている。
In FIG. 1, 1 is a main board (circuit board) made of a printed circuit board, 2 is an integrated circuit element (hereinafter referred to as IC), and 3
Reference numeral 4 indicates a chip-type electronic component, 4 indicates an electronic component with leads, and 5 indicates a sub-board, which is made of a printed circuit board, etc., and is formed to have approximately the same area as the IC 2.

6はチップタイプの電子部品である。6 is a chip type electronic component.

実装順序について説明すると、先ず、サブ基板5上に電
子部品6の電極7を半田づけ8等により接続して固定す
る。IC2はその外部電極の中、他の回路と接続されな
い電子部品6とのみ接続する外部電極9を主基板1上の
電子部品3,4と接続する外部電極10とは反対側の上
方に折り曲げて独立(分離)させておく。この外部電極
9をサブ基板5に形成した孔11 に挿通させ、この外
部電極9をサブ基板5上の電子部品6に半田づけ8によ
り接続する。その他の外部電極10は主基板1に形成し
た孔12に挿通させる。次にチップタイプの電子部品3
を接着剤13により主基板1に接着するさ共に、リード
付の電子部品4のリード15 を主基板1に形成した孔
16 に挿通させる。
To explain the mounting order, first, the electrodes 7 of the electronic component 6 are connected and fixed on the sub-board 5 by soldering 8 or the like. Among the external electrodes of the IC 2, the external electrode 9, which connects only to the electronic component 6 that is not connected to other circuits, is bent upward on the opposite side from the external electrode 10, which connects to the electronic components 3 and 4 on the main board 1. Keep it independent (separated). This external electrode 9 is inserted into a hole 11 formed in the sub-board 5, and is connected to the electronic component 6 on the sub-board 5 by soldering 8. The other external electrodes 10 are inserted into holes 12 formed in the main substrate 1. Next, chip type electronic parts 3
is adhered to the main board 1 with an adhesive 13, and at the same time, the leads 15 of the electronic component 4 with leads are inserted into the holes 16 formed in the main board 1.

然る後、IC2の外部端子10、電子部品3の電極14
、電子部品4のIJ−1−15を主基板1にそれぞれ半
田づけ8により接続する。
After that, the external terminal 10 of the IC 2 and the electrode 14 of the electronic component 3 are connected.
, IJ-1-15 of the electronic component 4 are connected to the main board 1 by soldering 8, respectively.

上記第1実施例によれば、本来、主基板1上に搭載され
るべき電子部品6をIC2の独立電極9のみによりサブ
基板5を介してIC20面面積内接続することができる
ので、サブ基板5と主基板1間の接続は不要であり、一
般ICの外部電極をそのまま利用するこ吉ができる。従
って、低コストで基板1の面積を縮小することができる
。またIC2の外部電極の一部、すなわち独立した外部
電極9が主基板lに挿入されなくなるので、主基板1の
配線面に余裕ができ、配線の引きまわしが容易になる。
According to the first embodiment, the electronic components 6 that should originally be mounted on the main board 1 can be connected within the surface area of the IC 20 via the sub-board 5 only by the independent electrodes 9 of the IC 2. 5 and the main board 1 is not necessary, and the external electrodes of a general IC can be used as they are. Therefore, the area of the substrate 1 can be reduced at low cost. Further, since a part of the external electrodes of the IC 2, that is, the independent external electrodes 9, are no longer inserted into the main board 1, there is ample space on the wiring surface of the main board 1, making it easier to route the wiring.

またIC2に電子部品6を接続したものを一つの部品と
して、標準化したモジュール構造とするこ吉がでさ、設
計や生産の合理化を図ることができる。さらに電子部品
6を外部に配置しているので、その交換が容易となる。
In addition, since the IC 2 and the electronic component 6 are connected as one component and have a standardized module structure, design and production can be rationalized. Furthermore, since the electronic component 6 is placed outside, its replacement becomes easy.

次に本発明の第2実施例について説明する。Next, a second embodiment of the present invention will be described.

本実施例においては、第2図に示すようにIC2の外部
電極の中、サブ基板5上の電子部品6のみに接続する外
部電極9を主基板1上の電子部品3.4と接続する外部
電極10より短く形成し、短い外部電極9をサブ基板5
に形成した孔11に挿通させる。この外部電極9をサブ
基板5上に接続されている電子部品6に半田づけ8によ
り接続する。次にIC2の長い外部電極10を主基板1
に形成した孔12に挿通させ、半田づけ8により接続す
るようにしたものであり、その他の構成は上記第1実施
例と同様である。上記サブ基板5は電子部品6と上下逆
或いは主基板に下付けにしてもよい。
In this embodiment, as shown in FIG. The short external electrode 9 is formed shorter than the electrode 10 on the sub-substrate 5.
It is inserted into the hole 11 formed in . This external electrode 9 is connected to the electronic component 6 connected on the sub-board 5 by soldering 8. Next, connect the long external electrode 10 of IC2 to the main substrate 1.
The second embodiment is inserted through a hole 12 formed in the second embodiment and connected by soldering 8, and the other configurations are the same as those of the first embodiment. The sub-board 5 may be placed upside down with respect to the electronic component 6, or may be attached below the main board.

尚、主基板1とサブ基板5はプリント基板以外のセラミ
ック、メタル等、いかなる材質でもよく、片面パターン
のみでなく、両面、多層等、すべての回路基板を適用す
ることができる。また電子部品はすべての種類のものを
適用することができる。
Note that the main board 1 and the sub-board 5 may be made of any material other than printed circuit boards, such as ceramics and metals, and not only single-sided patterns, but also double-sided, multilayer, and other circuit boards can be applied. Moreover, all kinds of electronic components can be applied.

またIC2はプーアルインラインパッケージ(DIP)
のみてなく、あらゆるタイプのパッケージについて適用
することができる。またサブ基板5の椋ζ、大きさ、接
続方法はあらゆるものを適用することができる。さらに
サブ基板5を用いることなく、電子部品6を直接外部電
画9に接続することもてきる。
Also, IC2 is a Puer Inline Package (DIP).
It can be applied to all types of packaging. Furthermore, any thickness ζ, size, and connection method of the sub-board 5 can be applied. Furthermore, the electronic component 6 can be directly connected to the external electrical panel 9 without using the sub-board 5.

発明の効果 上記のように本発明によれば、集積回路素子の外部電極
の一部を他の回路と接続しない電子部品とのみ接続し、
集積回路素子の残る外部電極を回路基板に接続するよう
にしているので、集積回路素子の外部電極をそのまま利
用して集積回路素子の周辺電子部品の一部を集積回路素
子の面積内に納めることができ、低コストで電子部品の
高密度実装を図ることができ、しかも回路基板面積を縮
小して電子装置等の小型化を図ることができるっまた集
積回路素子の下方の回路基板面積に余裕ができ、配線を
容易に行うことができる。
Effects of the Invention As described above, according to the present invention, a part of the external electrode of an integrated circuit element is connected only to an electronic component that is not connected to other circuits,
Since the remaining external electrodes of the integrated circuit element are connected to the circuit board, some of the peripheral electronic components of the integrated circuit element can be accommodated within the area of the integrated circuit element by using the external electrodes of the integrated circuit element as they are. It is possible to achieve high-density mounting of electronic components at low cost, and it is also possible to reduce the circuit board area and miniaturize electronic devices, etc. Also, there is plenty of circuit board area below the integrated circuit element. This allows for easy wiring.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の第1実施例における実装方法を示す断
面図、第2図は本発明の第2実施例を示す断面図、第3
図は従来の実装方法を示す;断面図である。
FIG. 1 is a cross-sectional view showing the mounting method in the first embodiment of the present invention, FIG. 2 is a cross-sectional view showing the second embodiment of the present invention, and FIG.
The figure shows a conventional mounting method; it is a sectional view.

Claims (1)

【特許請求の範囲】[Claims] 集積回路素子の外部電極の一部を他の回路と接続しない
電子部品とのみ接続し、集積回路素子の残る外部電極を
回路基板に接続することを特徴とする電子部品の高密度
実装方法。
A method for high-density mounting of electronic components, characterized in that a part of the external electrodes of the integrated circuit element are connected only to electronic components that are not connected to other circuits, and the remaining external electrodes of the integrated circuit element are connected to a circuit board.
JP20829386A 1986-09-04 1986-09-04 Method of high density mounting of electronic parts Pending JPS6364391A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20829386A JPS6364391A (en) 1986-09-04 1986-09-04 Method of high density mounting of electronic parts

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20829386A JPS6364391A (en) 1986-09-04 1986-09-04 Method of high density mounting of electronic parts

Publications (1)

Publication Number Publication Date
JPS6364391A true JPS6364391A (en) 1988-03-22

Family

ID=16553855

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20829386A Pending JPS6364391A (en) 1986-09-04 1986-09-04 Method of high density mounting of electronic parts

Country Status (1)

Country Link
JP (1) JPS6364391A (en)

Similar Documents

Publication Publication Date Title
EP1327265B1 (en) Electronic module having canopy-type carriers
KR20010076213A (en) Semiconductor device and its wiring method
US5473190A (en) Tab tape
JPH0529537A (en) Semiconductor module structure
JPH05198732A (en) Method and device for changing function of integrated circuit module
JPH0239587A (en) High density mounting printed board
JPS6364391A (en) Method of high density mounting of electronic parts
JPH02134890A (en) Circuit element mounting board
JPH03187253A (en) Semiconductor device
JPH0129802Y2 (en)
JP3769881B2 (en) Electronic circuit equipment
JPH0458189B2 (en)
JPH0473298B2 (en)
JPH10321757A (en) Electronic circuit module
JP2857823B2 (en) Electronic component mounting structure on circuit board
JPH04181792A (en) Connecting device for printed circuit board
JPH03159797A (en) Divided substrate structure for ic card
JPH098462A (en) Multilayer printed-wiring board module
JPH0558665B2 (en)
JPH0430565A (en) High power output hybrid integrated circuit device
JPH0590728A (en) Hybrid integrated circuit board
JPH09199669A (en) Printed wiring board module
JP2000164461A (en) Chip component
JPH0529538A (en) Semiconductor module structure
JPH05226518A (en) Hybrid integrated circuit device