JPH0590728A - Hybrid integrated circuit board - Google Patents

Hybrid integrated circuit board

Info

Publication number
JPH0590728A
JPH0590728A JP3249192A JP24919291A JPH0590728A JP H0590728 A JPH0590728 A JP H0590728A JP 3249192 A JP3249192 A JP 3249192A JP 24919291 A JP24919291 A JP 24919291A JP H0590728 A JPH0590728 A JP H0590728A
Authority
JP
Japan
Prior art keywords
circuit board
integrated circuit
hybrid integrated
board
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3249192A
Other languages
Japanese (ja)
Inventor
Tsukasa Sugano
司 菅野
Junichi Kato
純一 加藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Lighting and Technology Corp
Toshiba AVE Co Ltd
Original Assignee
Toshiba Lighting and Technology Corp
Toshiba AVE Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Lighting and Technology Corp, Toshiba AVE Co Ltd filed Critical Toshiba Lighting and Technology Corp
Priority to JP3249192A priority Critical patent/JPH0590728A/en
Publication of JPH0590728A publication Critical patent/JPH0590728A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/141One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components

Abstract

PURPOSE:To obtain a hybrid integrated circuit board which can be miniaturized, had improved high-frequency characteristics, and further enables other printed circuit boards such as a mother printed circuit board to be connected to be highly dense and inexpensive. CONSTITUTION:The title item is provided with a printed circuit board main body 11 where a circuit pattern is formed and chip-shaped electric parts 13 which also play a role of a external connection terminal mounted after being connected to a circuit pattern on the printed circuit board main body 11.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は混成集積回路基板に関す
る。
This invention relates to hybrid integrated circuit boards.

【0002】[0002]

【従来の技術】従来の混成集積回路基板では、マザー基
板等の他の基板のスルホールに電気的に接続したり、同
基板に保持させたりするために複数本のリードフレーム
が取付けられている。かかる混成集積回路基板のリード
フレームの取付け形態としては、DIP(デュアルイン
ラインパッケージ)、SIP(シングルインラインパッ
ケージ)、ZIP(ジグザグインラインパッケージ)な
どが知られている。前記DIP形態の混成集積回路基板
では、例えば図5に示すように回路パターンが形成され
た基板本体1上に抵抗体、ICチップ等の電子部品2が
実装されると共に、該基板本体1の対向する側面に複数
本のリードフレーム3が平行に並んで取付けられてい
る。
2. Description of the Related Art In a conventional hybrid integrated circuit board, a plurality of lead frames are attached so as to be electrically connected to a through hole of another board such as a mother board or to be held by the board. Known attachment forms of the lead frame of such a hybrid integrated circuit board include DIP (dual inline package), SIP (single inline package), and ZIP (zigzag inline package). In the DIP type hybrid integrated circuit board, for example, an electronic component 2 such as a resistor or an IC chip is mounted on a board body 1 on which a circuit pattern is formed as shown in FIG. A plurality of lead frames 3 are attached side by side in parallel with each other.

【0003】前記混成集積回路基板によれば、図6に示
すようにリードフレーム3をマザー基板4のスルホール
5に挿入して半田付け等を施すことによって、該マザー
基板4上に該混成集積回路基板を電気的に接続した状態
で固定できる。
According to the hybrid integrated circuit board, as shown in FIG. 6, the lead frame 3 is inserted into the through hole 5 of the mother board 4 and soldered or the like so that the hybrid integrated circuit is formed on the mother board 4. It can be fixed while the substrate is electrically connected.

【0004】しかしながら、上述した従来の混成集積回
路基板では、リードフレームを取付けるために基板本体
の端部がデッドスペースとなって小型化が阻害されると
いう問題があった。また、高周波電流を流すとリードフ
レームが回路設計上、不要なインダクタンスとして働い
て、共振を発生するために高周波特性が低下するという
問題もあった。
However, in the above-mentioned conventional hybrid integrated circuit board, there is a problem that the end portion of the board body becomes a dead space for mounting the lead frame, which hinders miniaturization. Further, when a high-frequency current is passed, the lead frame acts as an unnecessary inductance in the circuit design and causes resonance, which deteriorates the high-frequency characteristics.

【0005】更に、上述した従来の混成集積回路基板で
は、マザー基板等の他の基板との接続に際し、他の基板
にスルホールを形成する必要がある。このため、他の基
板の配線スペースが制限されて高密度化が阻害された
り、配線設計の自由度が低下するという問題があった。
また、スルホールを形成するため他の基板の加工コスト
が高くなるという問題もあった。
Further, in the above-mentioned conventional hybrid integrated circuit board, it is necessary to form a through hole in another board when connecting to another board such as a mother board. For this reason, there is a problem that the wiring space of the other substrate is limited, the densification is hindered, and the degree of freedom in wiring design is reduced.
There is also a problem that the cost of processing other substrates is increased because the through holes are formed.

【0006】[0006]

【発明が解決しようとする課題】本発明は、従来の問題
点を解決するためになされたもので、小型化可能で、か
つ高周波特性が優れ、更に接続される他の基板の高密度
化及び低コスト化を実現することが可能な混成集積回路
基板を提供しようとするものである。
SUMMARY OF THE INVENTION The present invention has been made in order to solve the problems of the prior art, and can be miniaturized, has excellent high-frequency characteristics, and has a high density of other substrates to be connected, and An object of the present invention is to provide a hybrid integrated circuit board capable of realizing cost reduction.

【0007】[0007]

【課題を解決するための手段】本発明は、回路パターン
が形成された基板本体と、前記基板本体上に前記回路パ
ターンと電気的に接続して実装された外部接続端子を兼
ねるチップ形状の電気部品とを具備することを特徴とす
る混成集積回路基板である。
According to the present invention, there is provided a board main body on which a circuit pattern is formed, and a chip-shaped electric body which is mounted on the board main body by being electrically connected to the circuit pattern and also serving as an external connection terminal. A hybrid integrated circuit board comprising: a component.

【0008】前記電気部品は、例えば鉄、銅、真鍮等の
金属などの導電性を有するものから形成される。その形
状としては、多角柱状、円柱状、多角錐状、円錐状など
が挙げられる。前記電気部品は、外部接続端子としての
機能を有すると共に、その材質,形状を選択することに
より回路設計上に組込まれる抵抗体やインダクタンス等
として機能させてもよい。また、前記電気部品には、他
の基板との半田付け性や接着性を高める観点から、その
側面に半田付け面(又は接着面)に達するスリットを形
成することが望ましい。
The electric parts are formed of a conductive material such as a metal such as iron, copper, or brass. Examples of the shape include a polygonal column shape, a column shape, a polygonal pyramid shape, a conical shape, and the like. The electric component may have a function as an external connection terminal, and may also be made to function as a resistor or an inductance incorporated in the circuit design by selecting the material and shape thereof. Further, from the viewpoint of improving solderability and adhesiveness with other substrates, it is desirable that the side surface of the electric component has a slit reaching the soldering surface (or the adhering surface).

【0009】前記電気部品を基板本体上に実装する方法
としては、基板本体上のランド等の導電部に電気部品を
リフロー半田付け等で半田付けするか、或いは導電性接
着剤を用いて接着する方法が挙げられる。
As a method of mounting the electric component on the substrate body, the electric component is soldered to a conductive portion such as a land on the substrate body by reflow soldering or the like, or is adhered using a conductive adhesive. There is a method.

【0010】[0010]

【作用】本発明によれば、前記基板本体上に前記回路パ
ターンと電気的に接続して実装された外部接続端子を兼
ねるチップ形状の電気部品を具備することによって、小
型化可能で、かつ高周波特性が優れ、更に接続される他
の基板の高密度化及び低コスト化を実現することが可能
な混成集積回路基板を得ることができる。
According to the present invention, by providing a chip-shaped electric component which is also electrically connected to the circuit pattern and mounted on the substrate body and also functions as an external connection terminal, miniaturization and high frequency can be achieved. It is possible to obtain a hybrid integrated circuit board which has excellent characteristics and can realize high density and low cost of other boards to be connected.

【0011】即ち、前記混成集積回路基板の前記電気部
品を他の基板上のランド等の導電部に配置してリフロー
半田付け等の半田付け、或いは導電性接着剤を用いた接
着などを施すことによって、前記混成集積回路基板を他
の基板に電気的に接続した状態で固定できる。
That is, the electric component of the hybrid integrated circuit board is arranged on a conductive portion such as a land on another board, and soldering such as reflow soldering or bonding using a conductive adhesive is performed. Thus, the hybrid integrated circuit board can be fixed while being electrically connected to another board.

【0012】従って、リードフレームを取付ける基板本
体の端部スペースが不要となるため小型化できると共
に、前記電気部品のリード長が短いため、回路設計上、
不要なインダクタンスとして作用するのを抑制できるた
め高周波特性を向上できる。更に、混成集積回路基板と
他の基板とを接続するに際して該他の基板にスルホール
を形成しないため、他の基板の配線スペースの割合を広
く取って高密度化したり、配線設計の自由度を高めるこ
とができる。また、他の基板にスルホールを形成する加
工コストを削減できる。
Therefore, the space for the end portion of the substrate body to which the lead frame is mounted is unnecessary, so that the size can be reduced, and the lead length of the electric component is short, which leads to a circuit design.
Since it can be suppressed from acting as unnecessary inductance, high frequency characteristics can be improved. Further, since the through hole is not formed in the other integrated substrate when connecting the hybrid integrated circuit substrate and the other substrate, the ratio of the wiring space of the other substrate is widened to increase the density and the flexibility of wiring design is increased. be able to. In addition, it is possible to reduce the processing cost for forming through holes on another substrate.

【0013】[0013]

【実施例】以下、本発明を図面を参照して詳細に説明す
る。 実施例1
The present invention will be described in detail below with reference to the drawings. Example 1

【0014】図1は、実施例1の混成集積回路基板を示
す斜視図である。即ち、図中の11は、回路パターンが
形成された基板本体である。前記基板本体11上には、
外部接続端子を兼ねる電気部品である四角柱状のチップ
リード12が抵抗体、ICチップ等の電子部品13と共
に複数個実装されている。前記チップリード12は、前
記電子部品13よりも高くなっている。
FIG. 1 is a perspective view showing a hybrid integrated circuit board of the first embodiment. That is, reference numeral 11 in the drawing is a substrate body on which a circuit pattern is formed. On the substrate body 11,
A plurality of quadrangular prismatic chip leads 12 which are electric parts that also serve as external connection terminals are mounted together with electronic parts 13 such as resistors and IC chips. The chip lead 12 is higher than the electronic component 13.

【0015】このような構成の混成集積回路基板によれ
ば、図2に示すようにマザー基板14上のランド15に
前記チップリード12をそれぞれ重ね合わせて半田付け
等を施して接続することによって、該マザー基板14に
該混成集積回路基板を実装できる。
According to the hybrid integrated circuit board having such a structure, as shown in FIG. 2, the chip leads 12 are respectively overlapped with the lands 15 on the mother board 14 and are connected by soldering or the like. The hybrid integrated circuit board can be mounted on the mother board 14.

【0016】従って、リードフレームを取付ける基板本
体11端部のスペースが不要となるため混成集積回路基
板自体を小型化できると共に、チップリード12のリー
ド長が短いため、回路設計上、不要なインダクタンスと
して作用するのを抑制できるため高周波特性を向上でき
る。
Therefore, the space at the end of the substrate body 11 to which the lead frame is mounted is unnecessary, so that the hybrid integrated circuit substrate itself can be miniaturized, and since the lead length of the chip lead 12 is short, it becomes an unnecessary inductance in the circuit design. Since it can be suppressed from acting, high frequency characteristics can be improved.

【0017】また、前記マザー基板14にスルホールを
形成しないため、マザー基板14の配線スペースの割合
を広く取って高密度化したり、配線設計の自由度を高め
ることができると共に、スルホールを形成する加工コス
トを削減できる。更に、チップリード12による両基板
間の接続箇所を適宜設定できるため配線設計の自由度を
より高めることができる。なお、マザー基板14の両面
に混成集積回路基板をそれぞれ実装したり、複数の混成
集積回路基板同士を積層することも可能である。 実施例2
Further, since the through holes are not formed in the mother substrate 14, the ratio of the wiring space of the mother substrate 14 can be widened to increase the density, and the flexibility of the wiring design can be increased, and the processing for forming the through holes can be performed. Cost can be reduced. Furthermore, since the connection point between the two substrates by the chip lead 12 can be set appropriately, the degree of freedom in wiring design can be further increased. It is also possible to mount the hybrid integrated circuit boards on both surfaces of the mother board 14 or to stack a plurality of hybrid integrated circuit boards. Example 2

【0018】図3は、実施例2の混成集積回路基板を示
す斜視図である。即ち、図中の21は、回路パターンが
形成された基板本体である。前記基板本体21の一方の
面には、抵抗体、ICチップ等の電子部品22が複数個
実装されている。前記基板本体21の他方の面には、外
部接続端子を兼ねる電気部品である四角柱状のチップリ
ード23がDIP形態(両端部に平行に並んで配置され
た形態)で複数個実装されている。
FIG. 3 is a perspective view showing a hybrid integrated circuit board of the second embodiment. That is, reference numeral 21 in the drawing is a substrate body on which a circuit pattern is formed. A plurality of electronic components 22 such as resistors and IC chips are mounted on one surface of the substrate body 21. On the other surface of the substrate body 21, a plurality of square columnar chip leads 23, which are electric components also serving as external connection terminals, are mounted in a DIP form (a form arranged in parallel at both ends).

【0019】このような構成の混成集積回路基板によれ
ば、図4に示すようにマザー基板24上のランド25に
前記チップリード23の外部接続端子側をそれぞれ重ね
合わせて半田付け等を施して接続することによって、該
マザー基板24に該混成集積回路基板を実装できる。
According to the hybrid integrated circuit board having such a structure, as shown in FIG. 4, the external connection terminal sides of the chip leads 23 are respectively overlapped with the lands 25 on the mother board 24 and soldered or the like. By connecting, the hybrid integrated circuit board can be mounted on the mother board 24.

【0020】従って、リードフレームを取付ける基板本
体21端部のスペースが不要となるため混成集積回路基
板自体を小型化できると共に、チップリード23のリー
ド長が短いため、回路設計上、不要なインダクタンスと
して作用するのを抑制できるため高周波特性を向上でき
る。
Therefore, the space at the end of the substrate main body 21 to which the lead frame is mounted is unnecessary, so that the hybrid integrated circuit substrate itself can be miniaturized, and since the lead length of the chip lead 23 is short, it becomes an unnecessary inductance in the circuit design. Since it can be suppressed from acting, high frequency characteristics can be improved.

【0021】また、前記マザー基板24にスルホールを
形成しないため、マザー基板24の配線スペースの割合
を広く取って高密度化したり、配線設計の自由度を高め
ることができると共に、スルホールを形成する加工コス
トを削減できる。なお、上記混成集積回路基板ではチッ
プリード23を基板本体21にDIP形態で取付けた
が、SIPやZIPなどの他の形態で取付けることも可
能である。
Further, since the through holes are not formed in the mother substrate 24, the ratio of the wiring space of the mother substrate 24 can be widened to increase the density, and the degree of freedom in the wiring design can be increased, and the processing for forming the through holes can be performed. Cost can be reduced. In the above hybrid integrated circuit board, the chip lead 23 is attached to the board main body 21 in the DIP form, but it may be attached in other forms such as SIP and ZIP.

【0022】[0022]

【発明の効果】以上詳述した如く、本発明によれば小型
化可能で、かつ高周波特性が優れ、更に接続される他の
基板の高密度化及び低コスト化を実現することが可能な
混成集積回路基板を提供することができる。
As described above in detail, according to the present invention, it is possible to miniaturize, it has excellent high frequency characteristics, and it is possible to realize high density and low cost of other substrates to be connected. An integrated circuit board can be provided.

【図面の簡単な説明】[Brief description of drawings]

【図1】実施例1の混成集積回路基板を示す斜視図FIG. 1 is a perspective view showing a hybrid integrated circuit board according to a first embodiment.

【図2】実施例1の混成集積回路基板とマザー基板との
接続状態を示す斜視図
FIG. 2 is a perspective view showing a connection state between the hybrid integrated circuit board and the mother board according to the first embodiment.

【図3】実施例2の混成集積回路基板を示す斜視図FIG. 3 is a perspective view showing a hybrid integrated circuit board according to a second embodiment.

【図4】実施例2の混成集積回路基板とマザー基板との
接続状態を示す斜視図
FIG. 4 is a perspective view showing a connection state between a hybrid integrated circuit board and a mother board according to a second embodiment.

【図5】従来の混成集積回路基板を示す斜視図FIG. 5 is a perspective view showing a conventional hybrid integrated circuit board.

【図6】従来の混成集積回路基板とマザー基板との接続
状態を示す斜視図
FIG. 6 is a perspective view showing a connection state between a conventional hybrid integrated circuit board and a mother board.

【符号の説明】[Explanation of symbols]

11,21…基板本体、12,23…外部接続端子を兼
ねるチップ形状の電気部品(チップリード)、14,2
4…マザー基板。
11, 21 ... Substrate body, 12, 23 ... Chip-shaped electric parts (chip leads) that also serve as external connection terminals, 14, 2
4 ... Mother board.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 回路パターンが形成された基板本体と、
前記基板本体上に前記回路パターンと電気的に接続して
実装された外部接続端子を兼ねるチップ形状の電気部品
とを具備することを特徴とする混成集積回路基板。
1. A substrate body on which a circuit pattern is formed,
A hybrid integrated circuit board, comprising: a chip-shaped electric component which is also electrically connected to the circuit pattern and mounted on the board body, and which also serves as an external connection terminal.
JP3249192A 1991-09-27 1991-09-27 Hybrid integrated circuit board Pending JPH0590728A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3249192A JPH0590728A (en) 1991-09-27 1991-09-27 Hybrid integrated circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3249192A JPH0590728A (en) 1991-09-27 1991-09-27 Hybrid integrated circuit board

Publications (1)

Publication Number Publication Date
JPH0590728A true JPH0590728A (en) 1993-04-09

Family

ID=17189272

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3249192A Pending JPH0590728A (en) 1991-09-27 1991-09-27 Hybrid integrated circuit board

Country Status (1)

Country Link
JP (1) JPH0590728A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0996323A2 (en) * 1998-10-07 2000-04-26 TDK Corporation Surface mounting part
WO2023243157A1 (en) * 2022-06-16 2023-12-21 日本メクトロン株式会社 Bonded printed wiring board and method for manufacturing bonded printed wiring board

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0996323A2 (en) * 1998-10-07 2000-04-26 TDK Corporation Surface mounting part
EP0996323A3 (en) * 1998-10-07 2000-05-03 TDK Corporation Surface mounting part
US6373714B1 (en) 1998-10-07 2002-04-16 Tdk Corporation Surface mounting part
WO2023243157A1 (en) * 2022-06-16 2023-12-21 日本メクトロン株式会社 Bonded printed wiring board and method for manufacturing bonded printed wiring board

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees