JPS6361822U - - Google Patents
Info
- Publication number
- JPS6361822U JPS6361822U JP15610686U JP15610686U JPS6361822U JP S6361822 U JPS6361822 U JP S6361822U JP 15610686 U JP15610686 U JP 15610686U JP 15610686 U JP15610686 U JP 15610686U JP S6361822 U JPS6361822 U JP S6361822U
- Authority
- JP
- Japan
- Prior art keywords
- output
- circuit
- resistor
- diagram showing
- oscillation circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010355 oscillation Effects 0.000 claims description 6
- 239000003990 capacitor Substances 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 8
- 230000000052 comparative effect Effects 0.000 description 1
Description
第１図〜第６図はこの考案に係る発振回路の実
施例を示すもので、第１図は回路図、第２図は出
力段インバータ部分の等価回路を示す回路図、第
３図は同上の出力段インバータにおいてｎＭＯＳ
がオン状態に転じたときの等価回路を示す回路図
、第４図は出力波形に重畳した外部電波による出
力直流レベルの変動を説明するための波形図、第
５図は出力波形に重畳した外部電波を示す波形図
、第６図は外部電波による発振周波数の変化率を
示す特性図で比較例も併せ示す図、第７図は従来
の発振回路を示す回路図、第８図は同上発振回路
における初段インバータへの入力波形および終段
インバータの出力波形を示す波形図、第９図は同
上の入力波形および出力波形に外部電波が重畳し
た状態を示す波形図である。
１〜３：インバータ、４〜９：ＭＯＳＦＥＴ（
能動素子）、１１：入力端子となるパツド、１２
：出力端子となるパツド、Ｃ１，Ｃ２：コンデン
サ、Ｒ１：入力保護用の抵抗、Ｒ２：外付抵抗、
Ｒ３：出力直流レベルの変動防止用の抵抗。
Figures 1 to 6 show examples of the oscillation circuit according to this invention. Figure 1 is a circuit diagram, Figure 2 is a circuit diagram showing an equivalent circuit of the output stage inverter portion, and Figure 3 is the same as above. nMOS in the output stage inverter of
Figure 4 is a waveform diagram to explain fluctuations in the output DC level due to external radio waves superimposed on the output waveform, and Figure 5 is a circuit diagram showing the equivalent circuit when the switch turns on. A waveform diagram showing radio waves, Fig. 6 is a characteristic diagram showing the rate of change of oscillation frequency due to external radio waves, and also shows a comparative example, Fig. 7 is a circuit diagram showing a conventional oscillation circuit, and Fig. 8 is the same oscillation circuit as above. FIG. 9 is a waveform diagram showing the input waveform to the first-stage inverter and the output waveform of the final-stage inverter in FIG. 1 to 3: Inverter, 4 to 9: MOSFET (
active element), 11: Pad serving as input terminal, 12
: Pad for output terminal, C 1 , C 2 : Capacitor, R 1 : Resistor for input protection, R 2 : External resistor,
R3 : Resistor for preventing output DC level fluctuation.
Claims (1)
本体に、外付抵抗を接続して発振させる発振回路
において、 前記回路本体に設けられた出力端子の内側に、
外部電波による出力直流レベルの変動を防止する
ための抵抗を接続したことを特徴とする発振回路
。[Claims for Utility Model Registration] In an oscillation circuit that oscillates by connecting an external resistor to a circuit body in which active elements and capacitors are integrated, an output terminal provided on the circuit body,
An oscillation circuit characterized in that a resistor is connected to prevent fluctuations in the output DC level due to external radio waves.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15610686U JPS6361822U (en) | 1986-10-14 | 1986-10-14 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15610686U JPS6361822U (en) | 1986-10-14 | 1986-10-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6361822U true JPS6361822U (en) | 1988-04-23 |
Family
ID=31077415
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15610686U Pending JPS6361822U (en) | 1986-10-14 | 1986-10-14 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6361822U (en) |
-
1986
- 1986-10-14 JP JP15610686U patent/JPS6361822U/ja active Pending
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