JPS6361150U - - Google Patents
Info
- Publication number
- JPS6361150U JPS6361150U JP1986156529U JP15652986U JPS6361150U JP S6361150 U JPS6361150 U JP S6361150U JP 1986156529 U JP1986156529 U JP 1986156529U JP 15652986 U JP15652986 U JP 15652986U JP S6361150 U JPS6361150 U JP S6361150U
- Authority
- JP
- Japan
- Prior art keywords
- package
- semiconductor chip
- semiconductor chips
- mentioned
- package unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986156529U JPS6361150U (enExample) | 1986-10-13 | 1986-10-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986156529U JPS6361150U (enExample) | 1986-10-13 | 1986-10-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6361150U true JPS6361150U (enExample) | 1988-04-22 |
Family
ID=31078229
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1986156529U Pending JPS6361150U (enExample) | 1986-10-13 | 1986-10-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6361150U (enExample) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0232547A (ja) * | 1988-07-22 | 1990-02-02 | Matsushita Electric Ind Co Ltd | 半導体実装装置 |
| JPH06275775A (ja) * | 1993-03-17 | 1994-09-30 | Nec Corp | 半導体装置 |
| WO2007125744A1 (ja) * | 2006-04-25 | 2007-11-08 | Oki Electric Industry Co., Ltd. | 両面電極構造の半導体装置及びその製造方法 |
| JP4795948B2 (ja) * | 2003-07-16 | 2011-10-19 | マックスウェル テクノロジーズ, インク | 放射線遮へい集積回路デバイス、集積回路デバイスを遮へいする方法、及び、集積回路ダイを放射線から保護する高信頼性パッケージを作る方法 |
| JP2019033266A (ja) * | 2012-09-17 | 2019-02-28 | コミッサリア ア レネルジー アトミーク エ オ エナジーズ アルタナティブス | 溝付き及びチップ付きデバイス用のキャップ、キャップを装備するデバイス、デバイスと配線要素のアセンブリ、及びその製造方法 |
-
1986
- 1986-10-13 JP JP1986156529U patent/JPS6361150U/ja active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0232547A (ja) * | 1988-07-22 | 1990-02-02 | Matsushita Electric Ind Co Ltd | 半導体実装装置 |
| JPH06275775A (ja) * | 1993-03-17 | 1994-09-30 | Nec Corp | 半導体装置 |
| JP4795948B2 (ja) * | 2003-07-16 | 2011-10-19 | マックスウェル テクノロジーズ, インク | 放射線遮へい集積回路デバイス、集積回路デバイスを遮へいする方法、及び、集積回路ダイを放射線から保護する高信頼性パッケージを作る方法 |
| WO2007125744A1 (ja) * | 2006-04-25 | 2007-11-08 | Oki Electric Industry Co., Ltd. | 両面電極構造の半導体装置及びその製造方法 |
| JP2019033266A (ja) * | 2012-09-17 | 2019-02-28 | コミッサリア ア レネルジー アトミーク エ オ エナジーズ アルタナティブス | 溝付き及びチップ付きデバイス用のキャップ、キャップを装備するデバイス、デバイスと配線要素のアセンブリ、及びその製造方法 |
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