JPS6349320B2 - - Google Patents

Info

Publication number
JPS6349320B2
JPS6349320B2 JP56076466A JP7646681A JPS6349320B2 JP S6349320 B2 JPS6349320 B2 JP S6349320B2 JP 56076466 A JP56076466 A JP 56076466A JP 7646681 A JP7646681 A JP 7646681A JP S6349320 B2 JPS6349320 B2 JP S6349320B2
Authority
JP
Japan
Prior art keywords
memory cell
circuit
test
junction
prom
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56076466A
Other languages
English (en)
Japanese (ja)
Other versions
JPS57191900A (en
Inventor
Nobuhiko Oono
Katsuya Mizue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Microcomputer System Ltd
Hitachi Ltd
Original Assignee
Hitachi Microcomputer System Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Microcomputer System Ltd, Hitachi Ltd filed Critical Hitachi Microcomputer System Ltd
Priority to JP7646681A priority Critical patent/JPS57191900A/ja
Publication of JPS57191900A publication Critical patent/JPS57191900A/ja
Publication of JPS6349320B2 publication Critical patent/JPS6349320B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/81—Threshold
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C2029/5006—Current

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
JP7646681A 1981-05-22 1981-05-22 Method for junction destructive prom test Granted JPS57191900A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7646681A JPS57191900A (en) 1981-05-22 1981-05-22 Method for junction destructive prom test

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7646681A JPS57191900A (en) 1981-05-22 1981-05-22 Method for junction destructive prom test

Publications (2)

Publication Number Publication Date
JPS57191900A JPS57191900A (en) 1982-11-25
JPS6349320B2 true JPS6349320B2 (show.php) 1988-10-04

Family

ID=13605935

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7646681A Granted JPS57191900A (en) 1981-05-22 1981-05-22 Method for junction destructive prom test

Country Status (1)

Country Link
JP (1) JPS57191900A (show.php)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010198693A (ja) * 2009-02-26 2010-09-09 Semiconductor Energy Lab Co Ltd Ｏｔｐメモリの検査方法、ｏｔｐメモリの作製方法、ｏｔｐメモリ、および半導体装置の作製方法

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61184799A (ja) * 1985-02-13 1986-08-18 Nec Corp プログラマブル・リ−ド・オンリ−・メモリ
JPS61187200A (ja) * 1985-02-14 1986-08-20 Nec Corp プログラマブル・リ−ド・オンリ−・メモリ
JPS61204898A (ja) * 1985-03-06 1986-09-10 Nec Corp プログラム可能な読出し専用半導体記憶装置の検査方法
JPS61230700A (ja) * 1985-04-05 1986-10-14 Nec Corp プログラマブル・リ−ド・オンリ−・メモリ
JPH0711920B2 (ja) * 1986-11-06 1995-02-08 株式会社日立製作所 プログラマブルｒｏｍ
US6584589B1 (en) * 2000-02-04 2003-06-24 Hewlett-Packard Development Company, L.P. Self-testing of magneto-resistive memory arrays

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59919B2 (ja) * 1978-11-27 1984-01-09 富士通株式会社 半導体記憶装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010198693A (ja) * 2009-02-26 2010-09-09 Semiconductor Energy Lab Co Ltd Ｏｔｐメモリの検査方法、ｏｔｐメモリの作製方法、ｏｔｐメモリ、および半導体装置の作製方法

Also Published As

Publication number Publication date
JPS57191900A (en) 1982-11-25

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