JPS634648A - Semiconductor device - Google Patents

Abstract

PURPOSE:To inhibit electromigration effectively, and to obtain resistance strong even against mechanical stress by forming a metallic wiring in three layer structure. CONSTITUTION:A metallic wiring is constituted of first-third wiring layers 25-27, the metallic wiring consisting of the three layers is patterned through a photoetching method, and sintered (alloyed), and an oxide film 28 for protection is deposited on the metallic wiring. Since the first wiring layer 25 is shaped from aluminum to which silicon is implanted, junction breakdown with source- drain regions 23 as N<+> diffusion layers can be prevented in the same manner as conventional devices. Since the silicon concentration of the second wiring layer 26 is made higher than the first wiring layer 25 and the third wiring layer 27, a diffusion toward the first wiring layer 25 or the third wiring layer 27 from the second wiring layer 26 is promoted in silicon in aluminum. Accordingly, the segregation of silicon can be prevented.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention provides a semiconductor device in which an aluminum wiring part used for connecting electrodes of a highly integrated semiconductor device is improved. Regarding.

(Prior Art) For example, as shown in FIG. 2, an aluminum interconnect 911 of a semiconductor device has a contact portion 14 with an N+ diffusion layer 13 formed on a semiconductor substrate 12 and serving as an element portion, for example.
The other element parts are used to electrically connect electrodes. In this case, aluminum wiring [111 and N
+When contacting with the diffusion layer 12, aluminum
In order to prevent the +diffusion layer 12 from being tampered with and being diffused into the semiconductor substrate 13, the aluminum wiring 11 is made of silicon implanted with a layered layer of several percent.

However, in wiring made of an alloy of aluminum and silicon, the movement of silicon in aluminum has become a problem.

For example, 100% of this silicon and aluminum alloy wiring
When left in a cooled state at a temperature of .degree. C. to 200.degree. C., silicon in the aluminum wiring 11 segregates into triple points of grains due to grain boundary diffusion, and silicon nodules 15 as shown in FIG. 3 are generated. In the area where the silicon nodules 15 are generated, the current density increases and electromigration resistance deteriorates, and the aluminum hardens in that area and becomes susceptible to mechanical damage due to stress, which may lead to wire breakage.

(Problems to be Solved by the Invention) The present invention has been made in view of the above points, and aims to prevent the occurrence of electromigration and provide a semiconductor device that is resistant to mechanical stress.

[Structure of the Invention] (Means for Solving the Problems) That is, in this invention, the metal wiring has a three-layer structure, and the first wiring layer is formed from silicon-injected aluminum. , the second wiring layer is formed from polycrystalline silicon or a compound of silicon and a high melting point metal,
The third wiring layer is formed from aluminum or silicon-injected aluminum.

(Function) In the metal wiring having the above structure, the silicon concentration in the second wiring layer is higher than the silicon concentration in the first and second wiring layers, and the direction of silicon diffusion is effectively controlled. This prevents silicon segregation.

(Example) An embodiment of the present invention will be described below with reference to FIG.

In the semiconductor device shown in this embodiment, in order to form a transistor, an active region is formed in the semiconductor substrate 21, and then the gate electrode 22 is turned by photolithography to form an N-type impurity. ABTS+ or p31
By implanting ions of 1st class, the source and
A drain region 23 is formed. Next, oxide 1124 is deposited on the gate electrode 22 and the entire surface of the substrate 21. Then, in order to form a contact for applying a potential to the source/drain electrode 23, the oxide 1124 is partially removed by dry etching, and then aluminum doped with silicon at a weight ratio of several percent is sputtered over the entire surface. Then, the first wiring layer 25 is formed. This first wiring layer 25 is formed to include a contact hole portion formed in the oxide film 24 reaching the region 23. Next, a second wiring layer 26 is formed on the first wiring layer 25 by sputtering silicon or a compound of silicon and a high melting point metal. Since bonding pads are also formed using aluminum wiring, aluminum or aluminum doped with silicon at a weight ratio of several percent is sputtered onto the second wiring layer 26 to improve its bonding properties. A wiring layer 21 is formed.

That is, the metal wiring of the semiconductor device is constituted by these first, second, and third wirings 1125 to 27.

After patterning these three layers of metal wiring by photolithography, sintering (alloying) is performed. Then, a protective oxide film 28 is deposited on this metal wiring.

Since the first wiring layer 25 is made of aluminum into which silicon is implanted, it is possible to prevent junction breakdown with the source/drain region 23, which is an N+ diffusion layer, as in the conventional case. Further, the second wiring layer 26 is the first wiring layer 25.
Since the silicon concentration in the third wiring layer 27 is higher than that in the third wiring layer 27, the silicon in the aluminum flows from the second wiring 126 to the first wiring! Diffusion toward a25 or the third wiring layer 21 is promoted. Therefore, it is possible to prevent silicon segregation as shown in FIG.

[Effects of the Invention] As described above, according to the present invention, electromigration can be effectively suppressed by forming the metal wiring into a three-layer structure, and since the grain sizes of each layer are different, mechanical stress can be suppressed. It can also provide strong resistance.

[Brief explanation of drawings]

FIG. 1 is a sectional view illustrating a semiconductor device according to an embodiment of the present invention, the second factor is a sectional view illustrating a conventional semiconductor device, and FIG. 3 is a diagram illustrating the segregation state of silicon in a conventional semiconductor device. It is. 21... Semiconductor substrate, 22... Gate electrode, 23...
... Source/drain region, 24... Oxide film, 25.
...First wiring layer, 26...Second wiring layer, 27...
- Third wiring layer, 28...protective oxide layer. Applicant's agent Patent attorney Takeshi Suzue Foolish plan Figure 1 Figure 2

Claims (2)

[Claims] (1) A first wiring layer made of silicon-injected aluminum and formed to be connected to an element contact part or an electrode part formed in a semiconductor device; and a first wiring layer formed on this first wiring layer. , a second wiring layer made of polycrystalline silicon, or a compound of silicon and a high-melting point metal, and a third wiring layer formed on the second wiring layer and made of aluminum or silicon-injected aluminum. A semiconductor device comprising: a metal wiring section comprising three wiring layers, the first to third layers. (2) The semiconductor device according to claim 1, wherein the silicon concentration of the second wiring layer is higher than the silicon concentration of the first wiring layer.