JPS61207032A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent any cavities from being produced in wiring layers by a method wherein an impurity added layer is formed at least on the surface part of wiring to be coated with electric insulating film. CONSTITUTION:After forming a P-type, N-type impurity conductive layer 2 on a main surface of e.g. Si substrate 1, an Si oxide film 3 is formed on overall surface to open a contact hole 4 into the connecting part to the impurity conductive layer 2 and then an Al film 5 is deposited on overall surface. Next an impurity e.g. As ion is added to the film 5 while an As added layer 6 is formed on the surface part of film 5. Then the film 5 is formed into specified wiring pattern to form the first Al wiring layer 7 while an SiN2 film 8 as an interlayer insulating film is deposited for coating the surface. Next a through hole 9 is opened into the film 8 to expose a part of wiring layer 7 and then another Al film 10 is formed again to pattern-form the second Al wiring layer 2 by selective etching process further forming an SiN2 film 13 as a passivation film on the wiring layer 12. Through these procedures, no cavities may be produced in the wiring layers at all.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a semiconductor device having an M wiring layer made of nuclide with an electrical insulating film, and in particular aims at improving reliability by preventing disconnections and short circuits in the wiring layer. Related to semiconductor devices.

[Conventional technology]

In general, semiconductor devices such as ICs and L8Is have a wiring layer for connecting circuit elements and between elements and external connection terminals, and this wiring layer is made of aluminum or an alloy mainly composed of aluminum. In addition, a multilayer film including an aluminum layer is used. and,
This wiring layer is coated with an electrical insulating film.For example, in a multilayer wiring structure, an interlayer insulating film is used to insulate the upper and lower wirings, and in the case of a topmost wiring layer or a single layer wiring structure, an electrical insulation film is formed to insulate the upper and lower wirings from the external environment. A passivation film is formed for the purpose of protection.

[Problem that the invention seeks to solve]

The present inventor has conducted various studies regarding the wiring layer as described above, and has found that when the wiring layer is formed and then an electrical insulating film is deposited on it to cover it, a cavity is formed in a part of the wiring layer. It has been revealed that this will occur. When heat treatment is further performed, the number and area of cavities increase, and in severe cases, the wiring layer may be cut.

For example, if a silicon nitride film 24 is deposited as an electrical insulating film on an aluminum wiring layer 23 formed on a surface silicon oxide film 22 of a semiconductor substrate 21 as shown in FIG. layer 23
A cavity 25 is generated within the aluminum wiring layer 23, and the cavity 25 is enlarged due to heat treatment in a subsequent process, and the aluminum wiring layer 23 is cut.

On the other hand, as shown in FIG. 3, if this cavity 25 is generated at the connection point with the upper layer aluminum wiring Nl26, that is, at the 27 through holes in the silicon nitride film 24, the etching solution used to form the through hole 27 may The underlying silicon oxide film 22 is etched through the etching hole 25, thereby forming a defect 28 that exposes the surface of the semiconductor substrate 210. For this reason, a portion of the upper aluminum wiring layer 26 is connected to the through hole 27. It will invade the cavity 25 and the defect 28 and cause a short circuit accident with the semiconductor substrate 21.

The cause of the formation of the cavities 25 has not yet been clarified, but according to the inventor's considerations, it is thought that stress and film quality such as residual gas in aluminum, crystallinity, and grain boundaries have an effect.

In any case, there is a problem in that desired circuit characteristics such as disconnections and short circuits in the wiring layer cannot be obtained due to the cavities.

[Means for solving problems]

The semiconductor device of the present invention prevents the formation of cavities in the wiring layer by forming an impurity-doped layer on at least the surface portion of the wiring that contains nuclide in the electrical insulating film.

Materials for the wiring layer include not only aluminum, but also alloys mainly composed of aluminium, and polyesters containing aluminum in part.
Membranes can be applied.

Furthermore, when forming the impurity-doped layer, ion implantation can be used.

According to the inventor's considerations, in the impurity-doped layer.

The wiring layer material and the impurity are alloyed together, which is said to be effective in preventing the formation of cavities. In addition, ion implantation of impurities impairs the crystallinity of the wiring layer material and makes it amorphous, impurities enter the grain boundaries and improve film quality, and temperature rise during ion implantation causes wiring to become amorphous. The release of gas in the layer also acts in a complex manner.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIGS. 1A to 1E show an embodiment in which the present invention is applied to a semiconductor device with a two-layer wiring structure, and are diagrams showing the manufacturing process thereof.

First, as shown in FIG. 1(A), a P type is formed on the entire surface of a silicon substrate 1 using treatments such as diffusion, oxidation, and etching.

After forming the N-type impurity conductive layer 2, a silicon oxide film 3 is formed over the entire surface by thermal oxidation or the like. Then, after forming contact holes 4 at connection points of the impurity conductive layer 2, an aluminum film 5 is deposited over the entire surface by vacuum evaporation.

Next, as shown in FIG. 5B, impurities such as arsenic ions are added to the aluminum film 5 by ion implantation to form an arsenic-doped layer 6 on the surface of the aluminum film 50.

Next, as shown in FIG. 3C, the aluminum film 5 is formed into a desired wiring pattern using conventional photolithography and etching techniques, and the first aluminum wiring layer 7,
7. Then, a silicon nitride film 8 as an interlayer insulating film is deposited thereon by the KCVD method.

Furthermore, as shown in FIG. 3(D), a through hole 9 is formed in the silicon nitride film 8 to expose a part of the first aluminum wiring layer 7, and an aluminum film 10 is formed thereon again. Similarly, arsenic ions are implanted into the surface to form an arsenic-doped layer 11.

Next, as shown in FIG. 1E, the aluminum film 10 is selectively etched to form a pattern of the second aluminum wiring layer 12, and a silicon nitride film 13 as a passivation film is formed thereon.

Below, windows for external connections are made using silicon nitride film 1 as necessary.
It will open on 3rd. Further, heat treatment is performed at 400° C. for about 30 minutes to complete the process.

According to the two-layer wiring structure constructed in this way, the first
It was confirmed that no cavities were formed in the wiring layer either when the silicon nitride film 8 was formed after forming the aluminum wiring layers 7 and 7, or when the subsequent heat treatment process was performed. The same is true for the second aluminum wiring layer 12, and no cavities are observed even after the formation of the silicon nitride film 13 and the subsequent heat treatment.

Therefore, in this two-layer wiring structure, the first. Breaking of each of the second aluminum wiring layers 7, 7, 12 can be prevented, and short circuits between them and the substrate 1 can also be prevented, and desired circuit characteristics can be obtained with high reliability.

Here, in the above embodiment, the aluminum wiring layer is formed by adding arsenic to the aluminum film and then patterning it, but it is also possible to do the patterning first and then add arsenic.

In addition to arsenic, added impurities include boron and phosphorus.

Argon, nitrogen, etc. may also be used.

Historically, in addition to pure aluminum, aluminum-silicon, aluminum-copper,
It may be an alloy mainly composed of aluminum, such as aluminum-copper-silicon, or it may be a multilayer film containing aluminum as a part, such as polycrystalline silicon-aluminum or tungsten-aluminum.

Note that the silicon nitride film used as an interlayer insulating film or a passivation film may be replaced with a silicon oxide film, an aluminum oxide film, or other insulating film, and similar effects can be obtained when these films are used.

Furthermore, the ion implantation method is a method widely used in semiconductor manufacturing processes, and can be easily applied to manufacturing the semiconductor device of the present invention.

〔Effect of the invention〕

As explained above, since the present invention forms an impurity-doped layer on at least the surface portion of the wiring layer covered with the electrical insulating film, cavities may be formed in the wiring layer even when the electrical insulating film is deposited and the subsequent heat treatment is performed. It is possible to prevent disconnections in the wiring layer and short circuits between the wiring layers or between the wiring layer and the substrate due to the cavity, thereby improving the reliability of the semiconductor device such as obtaining desired circuit characteristics. I can do it. Further, it is possible to prevent a decrease in the life of the wiring due to a reduction in the cross-sectional area of the wiring layer due to the cavity, and it is possible to further improve the reliability.

[Brief explanation of drawings]

FIGS. 1A to 1E are cross-sectional views showing one embodiment of the present invention according to the manufacturing process, and FIGS. 2 and 3 are cross-sectional views for explaining the problems of the prior art. 1... Semiconductor substrate, 2... Impurity conductive layer, 3... Silicon oxide film, 5... Aluminum film, 6... °゛°Arsenic-doped layer, 7------゛First aluminum wiring layer, 8...Silicon nitride film, 10...
・Aluminum film, 11... Arsenic added layer, 12
...Second aluminum wiring layer, 13...
・Silicon nitride film. '(φ Fig. 1 (A) Fig. 1 (B) 7---Stomach pressure function C~1 1---Silicon page form (S) Fig. (E) 7. 5--Silicon 1 "Nohi II Broiled Figure Z Figure 3

Claims (1)

[Claims] 1. A semiconductor device having a wiring layer disposed on a semiconductor substrate and whose surface is covered with an electrical insulating film, wherein an impurity-doped layer is formed on at least a surface portion of the wiring layer. A semiconductor device characterized by: 2. The semiconductor device according to claim 1, wherein the wiring layer is made of aluminum, an alloy mainly composed of aluminum, or a multilayer film containing aluminum.