JPS6331122A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To relieve any damage resultant from etching process of contact parts with respective step differences by a method wherein the etching rate of the second insulating films formed on the corresponding parts to contact holes is specified to be higher than that of the first insulating film of the other parts. CONSTITUTION: Photoresist layers 13 are removed while BPSG films 14 are deposited on overall surfaces to be heated for flattening surface performing wet etching process. At this time, the etching rate of SCG films 12 left as corresponding parts to contact holes being much higher than that of BPSG films 14, any damage to the surface of a gate electrode 4 can be sufficiently relieved even if there are step differences between the gate electrode 4 and impurity diffused regions 5a, 5b further subjected to different positions in the depth direction of contact parts. Furthermore, with SCG films 12 themselves in the state to be controlled not to expand in the peripheral directions, contact holes 8, 9a and 9b reaching the gate electrode 4 and the impurity diffused regions 5a, 5b can be made easily.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and more particularly to an improvement in a method for forming contact holes in a semiconductor device.

[Conventional technology]

An outline of a conventional method for forming contact holes in this type of semiconductor device is shown in the order of steps in FIGS. 2(a) to 2(h).

The manufacturing process of these conventional methods will be described with reference to each figure.

First, element isolation insulating films 2a and 2b are selectively formed on a silicon semiconductor substrate 1 by selective oxidation, etc., and then thermal oxidation is applied to the entire surface of the substrate surrounded by these element isolation insulators 192a and 2b. A gate insulating film 3 is formed by a method such as a gate insulating film 3, and a CVD (Chemical
Polycrystalline silicon is grown and deposited using a vapor deposition method or the like, and then selectively etched away using photolithography to form a gate electrode 4. This gate electrode 4 is then used as a mask. Then, impurity diffusion regions 5a and 5b, which will become source and drain regions, are formed by diffusion on the semiconductor substrate l by the self-line method (FIG. 2(a)).

After that, BP is applied to these entire surfaces using the C'JD method etc.
SG (Barophospbo 5ilicate G
lass) film 8 is grown.

(FIG. 6(b)), and the same BPSG film 6 was deposited at 900 nm.
The surface is flattened by heat treatment at about ℃ (Figure (C)),
Further, on this flattened BPSG film B, a patterned photoresist layer 7 is formed using a photolithography technique (FIG. 4(d)).

Then, using the patterned photoresist layer 7 as a mask, the BPS is etched by anisotropic dry etching.
The G film 6 is selectively etched to form contact holes 8, 9a, 9b reaching the gate electrode 4 and impurity diffusion regions 5a, 5b (see (e) and () in the same figure).
f)) During this etching, there is a step between the gate electrode 4 and the impurity diffusion regions 5a, 5b, and the depth of each contact hole 8, 8a, 9b for each of these is increased. Since the positions in the horizontal direction are different, the impurity diffusion region 5a is located at a deeper position,
5b, the BPSG film 6. In addition, the gate insulation I
Pi! 3 are etched to form contact holes 9a,
While the gate electrode 9b is being formed, a contact hole 8 is formed in the gate electrode 4 located at a shallower position, and a portion of the electrode surface is also etched.

Subsequently, the patterned photoresist layer 8 is removed by dry etching or the like, and heat treatment is performed at about 800° C. to form slopes in the contact holes 8, 9a, and 9b of the BPSG film 6. ((g) in the same figure), and finally, aluminum wiring 10 is formed in each contact hole 8 and 9a, 9b by sputtering or the like.
, lla, and llb are formed ((b) in the same figure).

[Problem that the invention seeks to solve]

In this way, in the conventional manufacturing method described above,
If there are two or more contact hole formation areas with different depths, part of the surface of the contact area may be etched in the shallower contact hole formation area, causing damage to the same surface area. There was a problem.

This invention was made to solve these conventional problems, and its purpose is to alleviate damage caused by etching on the shallow side when forming contact holes of different depths. I made it possible. An object of the present invention is to provide a method for manufacturing this type of semiconductor device.

[Means for solving problems]

In order to achieve the above object, a method for manufacturing a semiconductor device according to the present invention includes a first insulating film whose surface is flattened, and a first insulating film having a planarized surface passed through each contact portion formed on a semiconductor substrate and having a step difference therebetween. When forming contact holes, a second insulating film with a flattened surface having a higher etching rate than the first insulating film is formed on the semiconductor substrate including each contact portion, and a portion corresponding to the contact hole is left. , removing this second insulation film and forming a first insulation film with a flattened surface including the remaining second insulation film, and removing these first and second insulation films. In contrast, the second insulating film is etched under conditions that increase the etching rate, so that contact holes can be formed in each contact portion.

[For production]

That is, in the method of the present invention, the etching rate of the second insulating film formed in the portion corresponding to the contact hole is made higher than that of the first insulating film in other portions, so that when etching the contact hole, Damage caused by etching of each contact portion having a step difference can be alleviated.

〔Example〕

Hereinafter, one embodiment of the method for manufacturing a semiconductor device according to the present invention will be described in detail with reference to FIGS. 1(a) to 1(i).

FIGS. 1(a) to 1j) are cross-sectional views showing the method of this embodiment in the order of steps, and in the method of FIGS. 1(a) to U), the above-mentioned FIGS. ) The same reference numerals as in the conventional method indicate the same or corresponding parts.

In this embodiment method, first, as in the conventional method described above, inter-element isolation insulating films 2a and 2b and a gate insulating film 3 are formed on a silicon semiconductor substrate l, and then a gate electrode 4, a source, and a drain are formed. Impurity diffusion regions 5a and 5b are formed (FIG. 2(a)).

After that, SOG (
A spin on glass (Spin On Glass) film 12 is formed, and
The surface is flattened by heat treatment at about ℃ (see figure (b)),
A photoresist layer 13 patterned using photolithography technology is placed on the planarized SOG film 1 and 2.
The same figure shows the formation corresponding to the part that will later become the contact hole (
C)), and using this photoresist layer 13 as a mask, the SOG film 1 is etched by wet or dry etching.
2 is selectively etched away. In other words, the SOG film 1 and 2 are applied only to the contact hole corresponding part ((d) in the same figure).
.

Next, after removing the photoresist layer 13, a BPSG film 14 is deposited on the entire surface by CVD or the like.
4. ((e) in the same figure), and this BPSG film 14
The surface was flattened by heat treatment at a total temperature of about 140°C (see the same figure).
f)) Then, by performing wet etching, in this case, the etching rate of the 75BPSG film 14, the SOG film 1 left as the contact hole corresponding portion, and the top 2 of the film is very high. In addition, even if there is a step between the gate electrode 4 and the impurity diffusion regions 5a and 5b, and the positions of the respective contact portions in the depth direction are different, the contact located at a shallower position In this case, the damage to the surface of the gate electrode 4 is sufficiently alleviated, and the SOG film 12 itself reaches the gate electrode 4 and the impurity diffusion regions 5a and 5b with its spread to the surroundings being restricted. Contact holes 8, 9a, and 9b can be easily formed (see FIG.
g) and (h)).

Furthermore, by performing heat treatment at about 800° C. in this state, the contact holes 8, 9a, and 9b of the BPSG film 14 are given appropriate slopes.
(i) in the same figure, and finally, aluminum interconnections 10, lla and llb are formed in each contact hole 8, 9a, 9b by sputtering or the like ((j) in the same figure).

Therefore, in the method of this embodiment, the second insulating layer with a high etching rate is applied to each contact portion having a step difference between them, that is, the contact hole forming portion for the gate electrode 4 and the impurity diffusion regions 5a and 5b. film,
Here, a first insulating film with a lower etching rate is formed on the SOG film 1 whose surface has been flattened.
Now, by covering all 14 BPSG films 14 with a flattened surface and performing wet or dry etching in this state, contact holes to each desired contact portion can be formed by sufficiently mitigating damage at the contact portion. It can be formed.

〔Effect of the invention〕

As detailed above, according to the method of the present invention, when a contact hole is formed through the first insulating film whose surface is flattened in each contact portion having a step on a semiconductor substrate, each contact First, a second insulating film with a planarized surface having a higher etching rate than the first insulating film is formed, and this second insulating film is removed, leaving a part corresponding to the contact hole. Then, a first insulating film with a flattened surface is formed including the remaining second insulating film, and a second insulating film is formed on these first and second insulating films. Etching is performed under conditions that increase the etching rate so that contact holes can be formed in each contact portion. The second insulating film, which has a high etching rate, is etched away as quickly as possible, and the damage caused by etching of each contact portion, which has a step difference, can be effectively and sufficiently alleviated, and the same level of etching can be achieved. Wet etching of each contact hole has an excellent feature such as being able to reduce the spread of the hole to the surrounding area due to the presence of the first insulating film.

[Brief explanation of drawings]

FIGS. 1(a) to 1j) are cross-sectional views showing the manufacturing method of a semiconductor device according to the present invention in the order of steps, and FIGS. 2(a) to h) are sectional views showing the manufacturing method according to the conventional example as above They are sectional views shown in order. 1... Semiconductor substrate, 2a, 2b... Inter-element isolation insulating film, 3... Gate insulating film, 4... Gate electrode (contact part), 5a, 5b... Impurity Diffusion region (contact part), 8 and 9a, llb・
...Contact hole, 10 and lla, llb・
...Aluminum wiring. 12... SOG film (second insulating film), 13...
Photoresist layer, 14...BPSG film (first insulating film). Agent Masuo Oiwa Figure 1 13s photo shoot ■ 4 +4;
0j, 4v:'lla, Ilb; aluminum f! Jl i
Collection 2nd figure

Claims (4)

[Claims] (1) A method of forming contact holes through a first insulating film whose surface is flattened in each contact portion formed on a semiconductor substrate that has a step difference between them, the method including each of the contact portions. forming a second insulating film with a flattened surface having a higher etching rate than the first insulating film on the semiconductor substrate; and removing the second insulating film leaving a portion corresponding to the contact hole. a step of forming a first insulating film with a planarized surface including the remaining second insulating film, and a step of forming a second insulating film with respect to these first and second insulating films etching under conditions that increase the etching rate of
A method of manufacturing a semiconductor device, characterized in that a contact hole can be formed in each of the contact portions. (2) The method for manufacturing a semiconductor device according to claim 1, wherein one of the contact portions is a gate electrode and the other is an impurity diffusion region. (3) The first insulating film is BPSG (Borophosph).
oSilicateGlass) film, the second insulating film is S
The method for manufacturing a semiconductor device according to claim 1 or 2, wherein the semiconductor device is an OG (Spin On Glass) film. (4) Etching the first and second insulating films
The method for manufacturing a semiconductor device according to claim 1, 2, or 3, characterized in that wet etching or dry etching is used.