JPH0334322A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To make a contact hole in the maximum pattern width at the top thereof taking a gentle shape by a method wherein the first glassy film formed on a semiconductor substrate by vapor deposition process is heat-treated and then the second glassy film is formed on the surface region using the same process again. CONSTITUTION:A silicon oxide film 12 is formed on a semiconductor substrate 11; a polycrystalline silicon film pattern 14 for gate electrode is formed on the silicon oxide film 12; and the first BPSG film 13 around 1mum thick is formed on the said pattern 14. Next, the whole body is heat-treated in oxidative atmosphere to flatten the stepped part 15. Next, the surface of the first BPSG film 13 is etched away by the film thickness of 2000-4000Angstrom using an HF base etchant. Later, the second BPSG film 16 around 2000Angstrom thick is formed again by vapor deposition process. Finally, a contact hole 17 is made in the first and second BPSG films 13, 16 by photo processing. Through these procedures, the pattern width is maximized at the top of the contact hole 17 taking a gentle shape.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of forming an open fiber edge film.

[Conventional technology]

In particular, the conventional method for forming a glabella insulating film in the manufacturing process of semiconductor devices is to form a glass film containing boron and/or phosphorus on a semiconductor substrate by vapor phase growth, and then to improve the step shape. A heat treatment process was performed for the purpose of forming the contact hole, followed by a pattern forming process for forming the contact hole.

[Problem to be solved by the invention]

The conventional semiconductor device manufacturing method described above includes a heat treatment process after forming a glass film, and then a pattern forming process for forming contact holes. In this heat treatment step, outward diffusion of atoms such as phosphorus and boron occurs near the surface of the glass film, so that the concentration of these atoms becomes thinner.

As a result, the concentration of phosphorus and boron atoms in the glass film is low near the surface.

The etching rate of a glass film is generally influenced by the concentration of phosphorus or boron in the film, and as the concentration becomes thinner, the etching rate tends to slow down. For this reason, when a hole is provided in a glass membrane, the shape of the hole is narrow at the top and wide at the middle, resulting in an uneven shape. Therefore, in the subsequent process of forming internal wiring, the coverage of the wiring layer deteriorates, resulting in wire breakage and the like, resulting in a reduction in reliability.

[Means to solve the problem]

The method for manufacturing a semiconductor device of the present invention includes a step of forming a first glass film containing at least phosphorus or boron on a semiconductor substrate by a vapor phase growth method, and heat-treating the first glass film to planarize it. The method further comprises the steps of etching and removing the surface by a wet etching method, and forming a second glass film containing at least phosphorus or boron on the first glass film whose surface has been etched. Ru.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIGS. 1(a) to 1(d) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining an embodiment of the present invention, and particularly show the case where the present invention is applied to an MO3 type transistor.

FIG. 2 is a diagram showing the distribution of etching rates in the depth direction of a BPSG film according to an embodiment of the present invention.6 The etching rates of a conventional example are also shown for reference.

First, as shown in FIG. 1(a), a silicon oxide film 12 for a gate is formed on a semiconductor substrate 11 to a thickness of 200 to 600 layers, and a polycrystalline silicon film pattern 14 for a gate electrode is formed.
BPSGII! is formed on top of it. ]3 to about 1μ
Formed with a film thickness of m.

Next, as shown in Figure (b), 800-950℃
Heat treatment is performed in an oxidizing atmosphere at a temperature of
flatten.

Next, as shown in FIG. 1(c), the first BPSG film 13 is
The surface of
Etching removes only the thickness of the human body. Thereafter, the second BPSG film 16 is formed again using the vapor phase growth method to a total thickness of 16,000 wafers. At this time, the second BPSG film 16 is entirely 1
6 does not need to be exactly the same as the first BPSGwA13, and may be modified as desired. Moreover, the film thickness is the same as that of the first BPS.
It is better to be thinner than the remaining film thickness of G113. This is because the shape of the opening 17 for contact in the next step is improved.

Next, as shown in FIG. 1(d), contact openings 17 are formed in the first and second BPSG films 1316 by photoprocessing. Since the total 16-chiking speed of the second BPSG film 16 on the surface is at its maximum as shown by curve A in FIG. Become. Therefore, when an internal wiring is formed in this contact opening 17, the coverage is improved, and the occurrence of disconnection of the wiring is extremely reduced.

〔Effect of the invention〕

As explained above, the present invention applies heat treatment to a first glass film formed on a semiconductor substrate by vapor phase growth, then etches the surface area of this first glass film, and etches it again by the same method. By forming a second glass film on the surface, when forming contact holes, the etching rate is high near the surface of these glass films, so the pattern width is widest and smooth at the top of the hole. A large aperture can be formed. As a result, when internal wiring is formed, the coverage of the wiring layer in the contact hole is improved and there is no disconnection, which has the effect of improving reliability and yield.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view of a semiconductor chip for explaining an embodiment of the present invention, and FIG. 2 shows the distribution of etching rates in the depth direction of the glass film of an embodiment of the present invention and a conventional example. This is a diagram. 11... Semiconductor substrate, 12... Silicon oxide film, 1
3... ■th BPSG film, 14... Polycrystalline silicon film, 15... Step portion, 16... Second BPSG film,
17... Opening hole for contact.

Claims (1)

[Claims] a step of forming a first glass film containing at least phosphorus or boron on a semiconductor substrate by a vapor phase growth method;
a second glass film containing at least phosphorus or boron on the first glass film whose surface has been etched; A method of manufacturing a semiconductor device, the method comprising: forming a semiconductor device.