JPS63310128A - Bare chip mounting board and method for mounting - Google Patents

Abstract

PURPOSE:To make an alignment operation between a bare chip and a wiring board easy and to enhance its accuracy by a method wherein an opening of an insulating film is aligned with an electrode of the bare chip, the insulating film is bonded to the bare chip, its protruding end is aligned with a pattern of the wiring board and the electrode of the bare chip is bonded electrically to an electrode of the wiring board. CONSTITUTION:An insulating film 4 is bonded to a bare chip 1 in such a way that openings 5 of the insulating film 4 are aligned with electrodes 2 of the bare chip 1, i.e., in such a way that the electrodes 2 of the bare chip are exposed from the openings 5. After protruding ends 4a of the insulating film 4 which protrude from end parts of the bare chip 1 have been aligned with alignment patterns 8 of a wiring board 6, the electrodes 2 of the bare chip are bonded electrically to electrodes 7 of the wiring board 6. In this manner, an alignment operation between the bare chip 1 and the wiring board 6 is executed by making use of the protruding ends 4a of the insulating film 4 which have protruded from the ends of the bare chip. By this setup, an alignment state can be confirmed with the naked eye; the bare chip 1 can be mounted with high alignment accuracy.

Description

[Detailed Description of the Invention] [Purpose of the Invention (Industrial Application Field) The present invention relates to a bare chip mounting board in which a bare chip is mounted on a wiring board and a bare chip mounting method, and particularly to a bare chip mounting board in which a bare chip is mounted on a wiring board and a bare chip mounting method. The present invention relates to a bare chip mounting board and a bare chip mounting method.

(Prior art) As a bare chip mounting method, bumps of solder material or the like are formed on the electrodes on the bare chip or the electrodes on the wiring board, the bare chip is placed on the wiring board, the bumps are melted, and both electrodes are electrically connected. The flip-chip method is widely used. In this method, when the wiring board is a transparent substrate such as glass, the electrodes of the bare chip can be seen through the transparent substrate, so that it is easy to align both electrodes. However, in the case of opaque substrates such as ceramics, the alignment described above must be performed based on the external shape of the bare chip, resulting in a significant drop in alignment accuracy.To solve this problem, conventional bare chip A half mirror is interposed between the chip and the wiring board, and the electrodes of the bare chip and the electrodes of the wiring board are aligned through the half mirror, and then the half mirror is removed to perform mounting. In particular, when metal such as solder is used as the bump, even if the initial alignment is rough, the surface tension of the molten solder will automatically align the bare chip and the wiring board with good accuracy. Ru.

(Problem to be Solved by the Invention) However, in this method using a half mirror, after removing the half mirror, the bare chip is lowered a considerable distance and placed on the wiring board, which causes misalignment during this lowering. However, high-precision alignment is extremely difficult. In addition, positioning using the tactility of the bumps described above is possible due to the increase in electrode density as the number of electrodes on the bare chip increases.
Short circuits tend to occur between adjacent electrodes.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a bare chip mounting board and a bare chip mounting method that allow highly accurate positioning while preventing short circuits between adjacent electrodes.

[Structure of the Invention] (Means for Solving the Problems) The first invention of the present application includes a bare chip having an electrode on its surface: an opening is formed at a position corresponding to the electrode, and the opening is formed in the bare chip. an insulating film bonded to the bare chip such that the end thereof matches the electrode positionally and protrudes from the end of the bare chip; an alignment pattern in which the protruding end of the insulating film is aligned; and a wiring board having an electrode electrically connected to the electrode of the bare chip in a state where the alignment pattern is aligned with the protruding end of the insulating filler. .

Further, a second invention is to adhere an insulating film having an opening at a position corresponding to the electrode to a bare chip having an electrode so that the electrode is exposed from the opening, and then protrude from an end of the bare chip. The electrodes of the bare chip are electrically connected to the electrodes of the wiring board by aligning the protruding ends of the insulating film with the alignment pattern of the wiring board.

(Function) The insulating film is bonded to the bare chip so that the opening of the insulating film matches the electrode of the bare chip, that is, the bare chip electrode is exposed from the opening, and the insulating film protrudes from the end of the bare chip. After aligning the ends with the alignment pattern of the wiring board, the electrodes of the bare chip and the electrodes of the wiring board are electrically connected.

The alignment between the bare chip and the wiring board is performed using the protruding end of the insulating film that protrudes from the end of the bare chip, so this alignment can be visually confirmed, and the bare chip can be aligned with high accuracy. Implementation becomes possible.

(Example) An example of a bare chip mounting board and a bare chip mounting method according to the present invention will be described below with reference to the drawings.

In FIG. 1(a), a bare chip 1 of an integrated circuit is an IC chip for the flip-chip method, which is the same as the conventional one. Chip-side electrodes 2 such as I10 terminals and power supply pads are formed on this bare chip 1, and bumps 3 made of, for example, 5n-Pb solder are formed on the chip-side electrodes 2. The insulating film 4 is made of a polyfluorocarbon-based film with a dielectric constant of 5 or less, or a polyimide-based film that is stable at high temperatures of 125°C or higher, and has a thickness of 100 μm or less. This insulating film 4 is provided with openings 5 having a larger diameter than the bumps 3 at positions corresponding to the chip-side electrodes 2, that is, the bumps 3. The size of the insulating film 4 is such that when the insulating film 4 is adhered to the bare chip 1 so that the opening 5 matches the bump 3, that is, the bump 3 is exposed from the opening 5, at least a part of the edge 4a In this embodiment, as shown in FIG. 2, the projecting ends 4a project at right angles to each other. In order to bond the insulating film 4 to the bare chip 1 in an accurate position, the insulating film 4 is formed with a bare chip alignment pattern (not shown) that matches the wiring pattern of the bare chip 1, for example. ing. As this bare chip positioning pattern (not shown), various patterns including notches made in the insulating film 4 can be used.

As shown in FIG. 1(b) and FIG. 2, a wiring board 6 such as a ceramic multilayer wiring board is formed with a board-side electrode 7 corresponding to the chip-side electrode 2, and further has a shape of the outer edge of the protruding end 4a. A U-shaped alignment pattern 8 corresponding to the above is formed. Since this alignment pattern 8 has such a structure that it is desirable to form it simultaneously with the formation of the substrate-side electrode 7 and from the same metal as that, for example, Ni, as shown in FIG. A film 4 is adhered to the bare chip 1 so that the bumps 3 are exposed through the openings 5.

This adhesion is performed accurately using a bare chip alignment pattern (not shown) of the insulating film 4. Next, as shown in FIG. 1(b) and FIG. 2, the protruding end 4a of the insulating film 4 is attached to the wiring board When the bare chip 1 is aligned with the alignment pattern 8 of 6 and placed on the wiring board 6, each bump 3 comes into contact with the corresponding board side electrode 7. After this,
The bumps 3 are heated and melted to form chip-side electrodes 2 and substrate-side electrodes 7.
are electrically connected by bumps 3.

Since the protruding end 4a protrudes from the bare chip side surface 1a, the alignment between the protruding end 4a and the alignment pattern 8 can be visually observed and performed very accurately. This highly accurate alignment between the protruding end 4a and the alignment pattern 8 is achieved by
This means that the alignment between the bare chip 1 and the wiring board 6 is also highly accurate. Therefore, even if the number of chip-side electrodes 2 on the bare chip 1 is from hundreds to hundreds, sufficiently high precision mounting is possible. Furthermore, the insulating film 4 interposed between the bare chip 1 and the wiring board 6 is
The bumps 3 act as dams or obstacles to prevent short circuits between adjacent pans 13.

In the above embodiment, the outer peripheral shape of the protruding end 4a of the insulating film J1 is used as an alignment pattern to align with the alignment pattern 8 of the wiring board 6. An example in which an alignment pattern is formed in the center of the image will be explained with reference to FIG.

In FIG. 3, an alignment pattern 9 is formed at the center of the insulating film projecting end 4a, and an alignment pattern 10 corresponding to the alignment pattern 9 is also formed on the wiring board 6. The alignment pattern 9 of the insulating film protruding end 4a is formed simultaneously with the formation of the bare chip alignment pattern (not shown) of the insulating film used when bonding the insulating film 4 to the bare chip 1. The alignment accuracy of mounting is improved to a certain extent.

FIG. 4 shows another method of bonding the insulating film 4 to the bare chip 1. As shown in FIG. It is bonded to the bare chip 1 in such a manner. Thereafter, the bump material 3A is placed on the electrode 2 in the opening 5 as shown in FIG. 4(b), and heated to melt the bump material 3A and placed on the electrode 2 as shown in FIG. form a bump. The subsequent steps are the same as those shown in FIGS. 1 to 3 above.

According to this method, the chip side of the bump material 3A is aligned with the pole 2 simply by placing it in the opening 5 of the insulating film 4, and since the insulating film 4 acts as a dam when the bump material 3A is melted, the chip side A desired bump is reliably formed on the electrode 2.

FIG. 5 shows a modification of the insulating film 4, in which a conductive pattern 11 surrounding the opening 5 is formed at a predetermined distance from the opening 5.

This conductive pattern 11 is connected to a ground potential or a power supply potential, and acts as a guide shield that reduces noise between adjacent electrodes or pans 1.

Note that a dedicated alignment pattern 8.10 may be used as shown in FIGS. 2 and 3, but instead of this!
! The wiring pattern originally formed on the Ia line board 6 can also be used instead.

Further, in the above example, one insulating film 4 and one bare chip 1 are bonded, but a plurality of bare chips of the same type or different types may be bonded to one insulating film 4, thereby increasing the packaging density. can be increased.

[Effects of the Invention] As is clear from the above description, according to the present invention, an insulating film is adhered to a bare chip so that the openings of the insulating film match the electrodes of the bare chip, and The protruding ends of the insulating film are aligned with the alignment pattern of the wiring board, and the electrodes of the bare chip and the electrodes of the wiring board are electrically connected, making it extremely easy to align the bare chip and the wiring board. The alignment accuracy can be greatly improved.

[Brief explanation of the drawing]

FIGS. 1(a) and 1(b) are cross-sectional views showing an embodiment of a bare chip mounting board and bare chip mounting method according to the present invention,
Fig. 2 is a perspective view of the above embodiment, Fig. 3 is a perspective view showing a modification of the above embodiment, and Fig. 4 (a), <b), and (c) are cross sections showing the second embodiment. FIG. 5 is a plan view showing a modified example of the insulating film. 1... Bare chip 2... Chip side electrode 3... Bump 4... Insulating film 5. ......Opening 6...Wiring board 7...Board side electrode 8.10...Alignment pattern Applicant Toshiba Corporation Agent Patent Attorney Suyama Sa - Figure 1 Atsushi 20 Figure 3 (b) \] Figure 4 Figure 5

Claims (9)

[Claims] (1) A bare chip having an electrode on its surface; an opening is formed at a position corresponding to the electrode, the opening matches the electrode of the bare chip, and the end thereof protrudes from the end of the bare chip. an insulating film adhered to the bare chip; an alignment pattern in which the protruding end of the insulating film protruding from the end of the bare chip is aligned; and this alignment pattern is aligned with the protruding end of the insulating film. and a wiring board having an electrode electrically connected to the electrode of the bare chip in a state where the bare chip is mounted. (2) The bare chip mounting board according to claim 1, wherein the protruding end of the insulating film has an alignment pattern that is aligned with the alignment pattern of the wiring board. (3) The insulating film has a conductive pattern surrounding the opening at a predetermined distance from the opening, and the conductive pattern is connected to one of a ground potential and a power supply potential. A bare chip mounting board according to claim 1. (4) The bare chip mounting board according to claim 1, wherein the insulating film is a film containing polyfluorocarbon as a main component and having a dielectric constant of 5 or less. (5) The bare chip mounting board according to claim 1, wherein the insulating film is a film containing polyimide as a main component and is stable at high temperatures of 125°C or higher. (6) Glue an insulating film having an opening at a position corresponding to the electrode to the bare chip having the electrode so that the electrode is exposed through the opening, and then attach the insulating film protruding from the end of the bare chip. A method for mounting a bare chip, comprising electrically joining electrodes of the bare chip to electrodes of the wiring board by aligning protruding ends with alignment patterns of the wiring board. (7) The bare chip mounting method according to claim 6, wherein bumps are formed on the electrodes of the bare chip either before or after the insulating film is bonded. (8) The bare chip mounting method according to claim 7, wherein the protruding end of the insulating film has an alignment pattern that is aligned with the alignment pattern of the wiring board. (9) The insulating film has a conductive pattern surrounding the opening at a predetermined distance from the opening, and the conductive pattern is connected to one of a ground potential and a power supply potential. A bare chip mounting method according to claim 7 characterized by: