JPH10107079A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent solders from flowing out to the outside even if the solders are fused by a method wherein a sealing resin is injected between a semiconductor chip and a wiring board in such a way as to cover solder dams, which are formed of a solder resist on the wiring board. SOLUTION: The electrical connection of electrodes 5 on a semiconductor chip 4 with mounting pads 2 on a wiring board 1 is made by a method wherein solder bumps formed on the chip 4 are fused at the time of the connection and are connected with the pads 2. An outflow of solders 10 to a conductor pattern is inhibited by solder dams 3 formed on the board 1. A sealing resin 11 is injected between the chip 4 and the board 1 in such a way as to cover all of the solder dams 3 formed on the board 1. The resin 11 is used for the object of raising the reliability of connection of the connection parts of the electrodes 5 with the pass 2, a moisture resistance to circuits formed on the chip 4 and the board 1 and the like.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a connection structure between a semiconductor chip and a wiring board, and more particularly, to the connection between the semiconductor chip and the wiring board by flip-chip mounting using solder to connect the electrodes of the semiconductor chip to the wiring board. The present invention relates to a structure of a semiconductor device for connecting to a mounting pad.

[0002]

2. Description of the Related Art For example, Japanese Patent Application Laid-Open No. Hei 5-74858 discloses a flip chip mounting technique using solder bumps for connecting a semiconductor chip to a wiring board.

A structure of a conventional semiconductor device using flip chip mounting using solder bumps will be described with reference to FIGS. FIG. 7 is a plan view of the wiring board as viewed from the semiconductor chip mounting side.

The mounting pad section 16 formed on the wiring board 12 has a mounting pad 13 and a conductor pattern 14 connected to the mounting pad 13. Here, the conductor pattern 14
Has a constricted portion 15 having a smaller pattern width than the other conductor patterns 14. The constricted portion 15 is formed for the purpose of preventing the solder connected to the mounting pad 13 from flowing out to the conductor pattern 14 at the constricted portion 15.

FIG. 8 is a sectional view of a semiconductor chip. The semiconductor chip 17 is made of silicon nitride (SiN) except for the electrodes 18.
And is electrically insulated from the outside. A barrier metal layer 20 is formed on the electrode 18 of the semiconductor chip 17 using an evaporation method or a sputtering method, and solder is deposited on the barrier metal layer 20 using a plating method or a mask evaporation method. The solder bump 21 is formed by heating at a higher temperature. Semiconductor chip 1
In FIG. 7, solder bumps 21 are formed at positions corresponding to the mounting pads 13 of the wiring board 12.

FIG. 9 is a sectional view of a conventional structure of a semiconductor device. The solder bumps 21 formed on the semiconductor chip 17 are melted and connected to the mounting pads 13 on the wiring board 12. At the time of connection, the molten solder is
Spread wet on 6. The sealing resin 24 is injected between the semiconductor chip 17 and the wiring board 12.

[0007]

However, when the above-described semiconductor device is connected by melting the solder, the solder flows from the mounting pad to the conductor pattern. This makes it very difficult to suppress the flow of solder even if a constricted portion is formed. In addition, when a semiconductor device is mixed with a semiconductor chip and other components, or when a component other than the semiconductor chip is repaired, the solder of the semiconductor chip is placed in an environment at or above the melting point each time. The molten solder flows along the conductor pattern and flows out from the portion covered with the sealing resin. In the worst case, a cavity is formed in the connected solder, and a connection failure between the semiconductor chip and the wiring board occurs.

[0008] An object of the present invention is to solve the above problems,
Provided is a semiconductor device which suppresses the flow of solder to a conductor pattern on a wiring board and does not cause a connection failure between the semiconductor chip and the wiring board even when the semiconductor device is exposed to a temperature environment higher than the melting point of the solder. It is in.

[0009]

In order to achieve the above-mentioned object, a semiconductor device according to the present invention comprises a semiconductor chip having solder bumps on an electrode for making electrical connection with a wiring board; A wiring board in which a solder dam is formed with a solder resist around a mounting pad arranged at a position corresponding to the electrode arrangement, and a sealing resin for injecting between the semiconductor chip and the wiring board; Is injected so as to cover a solder dam formed between the semiconductor chip and the wiring board and on the wiring board with a solder resist.

In the semiconductor device of the present invention, a solder dam formed of a solder resist is provided around a mounting pad formed on the wiring board, and a sealing resin is provided between the semiconductor chip and the wiring board and between the semiconductor chip and the wiring board. By injecting so as to cover the solder dam formed above, the shape of the solder at the time of connection can be maintained. Therefore, even if the semiconductor device is placed in an environment where the solder melts after completion, the connection failure between the semiconductor chip and the wiring board due to the molten solder wetting into the conductive pattern can be prevented.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The configuration of a semiconductor device according to a preferred embodiment for implementing the semiconductor device of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view showing a semiconductor device of the present invention. This semiconductor device comprises a semiconductor chip 4 and a wiring board 1 and a sealing resin 11 injected between the semiconductor chip 4 and the wiring board 1.

FIG. 2 is a plan view of the wiring board used in the present invention as viewed from the semiconductor chip mounting side, and FIG. 3 is a sectional view of the wiring board. The wiring board 1 forms a mounting pad 2 and a conductor pattern (not shown in the drawing) using a subtractive method. The position of the mounting pad 2 is formed so as to correspond to the arrangement of the electrode 5 formed on the semiconductor chip 4.

The solder dam 3 is formed by applying an ultraviolet-curable liquid photo solder resist to the entire surface of the wiring substrate 1 by screen printing, and applying a pattern mask formed so that only the peripheral portion of the mounting pad 2 is exposed on the wiring substrate 1. Then, the solder pattern 3 is formed by exposing the mounting pattern 2 by exposing to ultraviolet rays and developing, and leaving the liquid photo solder resist adjacent to the mounting pad 2.

The size of the width L of the solder dam 3 is the same as the diameter of the solder bump 8 formed on the semiconductor chip 4 and is within a range of twice the diameter. The shape of the mounting pad 2 may be square, rectangular, or the like in addition to the circular shape as shown in FIG. This may be properly used depending on the layout of the pattern on the wiring board 12. However, the area of all the mounting pads 2 needs to be the same.

The surface of the mounting pad 2 is made of electroless Ni / A to improve solder wettability when mounting a semiconductor chip.
u-plated.

FIG. 4 is a sectional view of a semiconductor chip. The semiconductor chip 4 is covered with an insulating film 6, which is an insulating film such as silicon nitride (SiN), except for the electrodes 5, and is electrically insulated from the outside. A barrier metal layer 7 is formed on the electrode 5 of the semiconductor chip 4 by using an evaporation method, a sputtering method, or the like, and solder is formed on the barrier metal layer 7 by using a plating method or a mask vacuum evaporation method. The solder bumps 8 are formed by heating at a temperature higher than the melting point. The solder of this bump is eutectic solder.

The electrical connection between the electrodes 5 of the semiconductor chip 4 and the mounting pads 2 of the wiring board 1 is accomplished by melting the solder bumps 8 formed on the semiconductor chip 4 at the time of connection, and connecting the mounting pads 2. The solder dam 3 formed on the wiring board 1 suppresses the flow of the solder 10 into the conductor pattern.

The sealing resin 11 is formed between the semiconductor chip 4 and the wiring board 1 and on the solder dam 3 formed on the wiring board 2.
Inject to cover everything. The sealing resin 11 is used for the purpose of improving the connection reliability of the connection portion and improving the moisture resistance of the semiconductor chip 4 and the circuit formed on the wiring board 1.

The sealing resin 11 is formed by mixing a filler such as alumina or silica based on an epoxy resin. The proportion of the filler amount is from 30% by weight to 60% by weight.

Next, a manufacturing method for forming the structure of the semiconductor device of the present invention shown in FIG. 1 will be briefly described with reference to FIGS. 1, 5 and 6.

As shown in FIG. 5, a flux 9 is supplied to the tip of the solder bump 8 formed on the semiconductor chip 4 by using a transfer method in order to clean an oxide film on the surface of the solder bump 4 and improve solder wettability.

Solder bump 8 formed on semiconductor chip 4
Is aligned with the arrangement of the mounting pads 2 of the wiring board 1, and after the alignment, the semiconductor chip 4 is placed on the wiring board 1. Thereafter, the solder bump 10 is heated by using a reflow furnace in a nitrogen atmosphere at a temperature higher than the melting point (183 ° C.) of the solder bump 10. The connection between the electrode 5 of the semiconductor chip 4 and the mounting pad 2 of the wiring board 1 is performed with the molten solder 10 as shown in FIG.

Cleaning is performed using a solvent or the like to remove the flux residue remaining around the connected solder 10 and between the wiring board 1 and the semiconductor chip 4.

Then, a sealing resin 11 is injected so as to cover between the wiring board 1 and the semiconductor chip 4, around the solder 10 on the mounting pad 2, and the solder dam 3. Make the device.

[0025]

According to the present invention, in a semiconductor device using a eutectic solder having a low melting point, a solder bump used for connection in flip-chip mounting is provided between a solder dam formed on a wiring board, the semiconductor chip and the wiring board, between a mounting pad and a conductive pattern. Covering the solder around the solder dam formed by the outflow solder resist and the solder dam with the sealing resin with the sealing resin allows the semiconductor device to be mixed with other components or to repair components other than semiconductor chips every time. Even if the solder of the chip is placed in an environment at or above the melting point, the solder used for the connection does not flow out even if the solder is melted. Therefore, in the semiconductor device of the present invention, the electrical connection between the semiconductor chip and the wiring board can be stably obtained.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a plan view showing a wiring board constituting the semiconductor device according to the embodiment of the present invention;

FIG. 3 is a cross-sectional view illustrating a wiring board included in the semiconductor device according to the embodiment of the present invention;

FIG. 4 is a cross-sectional view illustrating a semiconductor chip included in the semiconductor device according to the embodiment of the present invention.

FIG. 5 is a cross-sectional view showing a state where a flux is supplied to a semiconductor chip included in the semiconductor device according to the embodiment of the present invention;

FIG. 6 is a cross-sectional view showing a state where a semiconductor chip constituting the semiconductor device according to the embodiment of the present invention is connected to a wiring board.

FIG. 7 is a plan view showing a wiring board constituting a semiconductor device according to a conventional technique.

FIG. 8 is a cross-sectional view of a semiconductor chip constituting a semiconductor device according to a conventional technique.

FIG. 9 is a cross-sectional view showing a semiconductor device according to a conventional technique.

FIG. 10 is a cross-sectional view for explaining a defective state of a semiconductor device according to a conventional technique.

[Description of Signs] 1 Wiring board 2 Mounting pad 3 Solder dam 4 Semiconductor chip 10 Solder 11 Sealing resin

Claims (1)

[Claims] 1. A semiconductor chip having solder bumps for making electrical connection with a wiring board on an electrode, and a solder dam formed of a solder resist around a mounting pad arranged at a position corresponding to the arrangement of the electrode of the semiconductor chip. A solder dam formed between the semiconductor chip and the wiring board and between the semiconductor chip and the wiring board and on the wiring board with a solder resist. A semiconductor device that is implanted so as to cover the semiconductor device.