JPS63298660A - 入出力インタフェ−ス制御方式 - Google Patents

入出力インタフェ−ス制御方式

Info

Publication number
JPS63298660A
JPS63298660A JP13590487A JP13590487A JPS63298660A JP S63298660 A JPS63298660 A JP S63298660A JP 13590487 A JP13590487 A JP 13590487A JP 13590487 A JP13590487 A JP 13590487A JP S63298660 A JPS63298660 A JP S63298660A
Authority
JP
Japan
Prior art keywords
channel
data
sequence
input
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13590487A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0580695B2 (cs
Inventor
Kenji Yamaguchi
健二 山口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP13590487A priority Critical patent/JPS63298660A/ja
Publication of JPS63298660A publication Critical patent/JPS63298660A/ja
Publication of JPH0580695B2 publication Critical patent/JPH0580695B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP13590487A 1987-05-29 1987-05-29 入出力インタフェ−ス制御方式 Granted JPS63298660A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13590487A JPS63298660A (ja) 1987-05-29 1987-05-29 入出力インタフェ−ス制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13590487A JPS63298660A (ja) 1987-05-29 1987-05-29 入出力インタフェ−ス制御方式

Publications (2)

Publication Number Publication Date
JPS63298660A true JPS63298660A (ja) 1988-12-06
JPH0580695B2 JPH0580695B2 (cs) 1993-11-10

Family

ID=15162543

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13590487A Granted JPS63298660A (ja) 1987-05-29 1987-05-29 入出力インタフェ−ス制御方式

Country Status (1)

Country Link
JP (1) JPS63298660A (cs)

Also Published As

Publication number Publication date
JPH0580695B2 (cs) 1993-11-10

Similar Documents

Publication Publication Date Title
JPS63298660A (ja) 入出力インタフェ−ス制御方式
JP2009232491A (ja) モータ駆動用通信システム
JPS60206242A (ja) 通信方法
JP3677533B2 (ja) 双方向転送方法
JPH0776949B2 (ja) 光チャネルサブシステム
JPS5953575B2 (ja) 通信制御方式
JPH0530341B2 (cs)
JPH10290269A (ja) インタフェース変換回路
CN117767722A (zh) 一种电子负载并联中实现同步启动的装置和方法
KR200214405Y1 (ko) 중계시스템의 입력신호 바이패스 장치
JP3460502B2 (ja) シリアル伝送システム
JPS61211755A (ja) 通信制御装置
JPH04243451A (ja) ファイル伝送システム
JPS62199142A (ja) デ−タ送信方式
JPH05265898A (ja) 端末装置の自動設定方式
JPH0531410U (ja) 通信装置
JPH0690676B2 (ja) コマンド動作制御方式
JPS61186046A (ja) 端末接続制御方式
JPS63128839A (ja) 二重化制御方式
JPH01238249A (ja) 通信制御装置のｒｓ信号制御方式
JPS6316362A (ja) 通信システム評価方式
JPH05334211A (ja) 中継システムにおける終了処理中の障害処理方式
JPH04139555A (ja) バス中継装置
JPS63215133A (ja) 通信制御装置
JPH022280A (ja) ネットワーク資源認識方式