JPS63275142A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent disconnection troubles, by etching selectively a first insulating film previously formed on an insulating film on a substrate to make a groove, and burying a metal layer only in the groove to form a wiring in the manner in which the upper surface is made to be nearly flush with the same plane as the first insulating film. CONSTITUTION:On a semiconductor substrate 1 of one conductivity type, a diffusion region 2 of inverse conductivity type is arranged, and a silicon oxide film 3 is formed on the whole surface, which is subjected to a selective etching to form a window for winding connection, on the diffusion region 2. By a plasma CVD method, a silicon nitride film 4 is formed on the whole surface containing the window, and a groove 5 for wiring formation is arranged by eching selectively the silicon nitride film 4. By a suputtering method in the state where a negative voltage is applied to a substrate 1, an aluminum layer is selectively deposited only in the groove 5 to form an aluminum wiring 6, and by plasma CVD a silicon nitride film 7 is formed on the whole surface to form a wiring with a flat surface. Thereby, the metal wiring does not suffer stress, and the discconectection can be prevented.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a semiconductor device.

[Conventional technology]

Multilayer wiring technology has become indispensable as one way to increase the integration of semiconductor devices.

FIG. 3 is a cross-sectional view of a semiconductor chip for explaining a first example of a conventional semiconductor device.

As shown in FIG. 3, a diffusion region 2 of an opposite conductivity type is provided on a semiconductor substrate 1 of a negative conductivity type. Next, a silicon oxide film 3 is formed on the entire surface and selectively etched to form a wiring connection window on the diffusion region 2. Next, an aluminum film is deposited on the entire surface including the window and selectively etched to form an aluminum wiring 6 connected to the diffusion region 2 of the window.

Next, a silicon nitride film 4 is formed over the entire surface.

The aluminum wiring 6 may receive stress from the silicon nitride film 4 during subsequent heat treatment, etc., and cracks 9 may occur in the aluminum wiring 6.

FIG. 4 is a cross-sectional view of a semiconductor chip for explaining a second example of a conventional semiconductor device.

As shown in FIG. 4, an aluminum film is deposited on the entire surface including the silicon oxide film 3 having wiring connection windows provided in the same manner as in the first example, and selectively etched to diffuse the windows. An aluminum wiring 6 connected to the region 2 and an aluminum wiring 10 close to the aluminum wiring 6- are provided, and a silicon nitride film 4 is provided over the entire surface including the aluminum wiring 6.10. Next, an opening is provided in the silicon nitride film 4 above the aluminum wiring 6, and an aluminum film is deposited over the entire surface including the opening and selectively etched to form the aluminum wiring 11.

Here, the aluminum wiring 11 is a concave portion 1 formed on the surface of the silicon nitride film 4 between the aluminum wirings 6 and 10.
Disconnection may occur due to the fact that the aluminum film is not uniformly deposited on the wire.

[Problem that the invention seeks to solve]

The conventional semiconductor device manufacturing method described above has a problem in that the metal wiring is subjected to stress due to strain generated in the insulating film covering the metal wiring, causing cracks and disconnection.

Further, there is a problem that the surface of the insulating film covering the metal wiring has many parts and steps, which may cause disconnection of the upper layer wiring formed on the insulating film.

[Means for solving problems]

A method for manufacturing a semiconductor device according to the present invention includes providing a lower insulating film having a wiring connection window for the semiconductor element region on a semiconductor substrate having a semiconductor element region, and forming a first insulating film on the lower insulating film including the window. a step of selectively etching the first insulating film above the window to provide a trench for forming a wiring; and forming a second insulating film on the first insulating film including the metal layer.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIGS. 1(a) to 1(d) are cross-sectional views of a semiconductor chip shown in order of steps for explaining a first embodiment of the present invention.

First, as shown in FIG. 1, a diffusion region 2 of opposite conductivity type is provided on a semiconductor substrate 1 of negative conductivity type. Next, a silicon oxide film 3 is formed on the entire surface and selectively etched to form a wiring connection window on the diffusion region 2, and a silicon nitride film 4 is deposited to a thickness of 1 μm on the entire surface including the word by plasma CVD. Form.

Next, as shown in FIG. 1(b), the silicon nitride film 4 is selectively etched in the region including the window to form a trench 5 for forming wiring.

Next, as shown in FIG. 1C, an aluminum laminate layer is deposited by sputtering while a negative voltage is applied to the semiconductor substrate 1. At this time, due to the negative voltage applied to the silicon substrate 11, aluminum molecules are deposited and simultaneously etched by the argon ions that are the sputtering gas, and the semiconductor substrate 1 is heated due to the incidence of the argon ions, resulting in a high temperature. The deposited aluminum molecules move, and the aluminum layer can be selectively deposited only in the groove 5, forming an aluminum wiring 6.

Next, as shown in FIG. 1(d), plasma CV is applied to the entire surface.
A silicon nitride film 7 is formed by D.

FIGS. 2(a) to 2(d) are cross-sectional views of a semiconductor chip shown in order of steps for explaining a second embodiment of the present invention.

As shown in FIG. 2(a), similarly to the first embodiment, a diffusion region 2 of the opposite conductivity type is provided on a semiconductor substrate 1 of one conductivity type, and a silicon oxide film 3 is formed on the entire surface and selected. A wiring connection window is provided above the diffusion region 2 by etching. Next, a silicon nitride film 4 is formed to a thickness of 1 μm over the entire surface by plasma CVD and selectively etched to provide a trench 5 for wiring formation in the region including the window.

Next, as shown in FIG. 2(b), an aluminum layer 8 is deposited to a thickness of 1 μm over the entire surface including the groove portion 5 by sputtering.

Next, as shown in Figure 2(C), a laser beam was applied to the entire surface with a power of 1 to 50 J/cm'' at 1 x 10-
The surface of the aluminum 6 film 8 is melted by irradiation for 6 to 1×10 −4 seconds, the aluminum film 5 is buried in the groove 5, and the surface of the aluminum 5 is made flat.

Next, as shown in FIG. 2(d), the entire surface of the silicon nitride film 4 is uniformly etched and removed using an anisotropic etching method so that the surface of the silicon nitride film 4 is exposed, and the aluminum layer 8 is formed only in the groove 5. The remaining aluminum wiring 6 is formed. Next, a silicon nitride film 7 is formed on the entire surface by plasma CVD.

By repeating the same procedure, multiple layers of multilayer wiring with flat surfaces can be formed.

〔Effect of the invention〕

As explained above, in the present invention, a first insulating film corresponding to the film thickness of the wiring layer is deposited in advance on an insulating ridge provided on a semiconductor substrate, and this is selectively etched to form a trench for forming wiring. A metal layer is formed so that the upper surface thereof is almost flush with the surface of the second insulating film, and a second insulating film is formed on the entire surface. No local stress is applied to the layer, which is effective in preventing wire breakage accidents.

Furthermore, since the surface of the insulating film covering the wiring is always flat, there is an advantage that even if multiple layers of wiring are formed, disconnections due to differences in level will not occur.

[Brief explanation of the drawing]

1 and 2 are cross-sectional views of a semiconductor chip shown in the order of steps for explaining the first and second embodiments of the present invention, and FIGS. 3 and 4 are cross-sectional views of a semiconductor chip of a conventional semiconductor device. FIG. 7 is a cross-sectional view of a semiconductor chip for explaining a second example. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Diffusion region, 3... Silicon oxide film, 4... Silicon nitride film, 5... Groove part,
6... Aluminum wiring, 7... Silicon nitride film, 8... Aluminum layer, 9... Crack, 1.0.1
1... Aluminum wiring, 12... Recessed part.

Claims (1)

[Claims] a step of providing a lower insulating film having a wiring connection window for the semiconductor element region on a semiconductor substrate having a semiconductor element region, and providing a first insulating film on the lower insulating film including the window;
selectively etching the first insulating film above the window to provide a groove for forming a wiring; 1. A method for manufacturing a semiconductor device, comprising: providing a metal layer having the following properties; and forming a second insulating film on the first insulating film including the metal layer.