JPS6226843A - Formation of electrode metal wiring pattern - Google Patents

Formation of electrode metal wiring pattern

Info

Publication number
JPS6226843A
JPS6226843A JP16652385A JP16652385A JPS6226843A JP S6226843 A JPS6226843 A JP S6226843A JP 16652385 A JP16652385 A JP 16652385A JP 16652385 A JP16652385 A JP 16652385A JP S6226843 A JPS6226843 A JP S6226843A
Authority
JP
Japan
Prior art keywords
wiring pattern
metal wiring
electrode metal
film
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16652385A
Other languages
Japanese (ja)
Inventor
Hideaki Itakura
秀明 板倉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP16652385A priority Critical patent/JPS6226843A/en
Publication of JPS6226843A publication Critical patent/JPS6226843A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent an electrode metal wiring pattern from deviating or disconnecting by a method wherein, after a recessed part is formed in advance in part of the part, which corresponds to the electrode metal wiring pattern, of the first interlayer insulating film, the electrode metal wiring pattern is formed in the recessed part. CONSTITUTION:A negative-type photosensitive resin film 7 is applied and an exposure is performed by irradiating light L'00 through a first masking plate 8, whereon the pattern to be transferred is already drawn. The opening 9 of the photosensitive resin film 7 is formed, subsequently a recessed part 10 is formed in the part, which is exposing in the opening 9, of a first interlayer insulating film 2 using an etching method. After this, when the photosensitive resin film 7 is removed, the first interlayer insulating film 2 having the recessed part 10 is obtained. After the formation of the recessed part 10, a metal film for electrode wiring, which consists of an Al film, is formed, and after that, a second photosensitive resin film 12 consisting of a positive-type photosensitive resin is applied. After that, the electrode metal wiring pattern is formed in the recessed part. By this way, even though the electrode metal wiring pattern is a long wiring pattern, the deviation or disconnection of the pattern can be prevented in the latter process.

Description

【発明の詳細な説明】 C産業上の利用分野〕 この発明は、半導体装置などの製造工程における電橋金
属配線パターンの形成方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION C. Industrial Application Field The present invention relates to a method for forming an electric bridge metal wiring pattern in the manufacturing process of semiconductor devices and the like.

〔従来の技術〕[Conventional technology]

第2図A−Gは、従来の電極金属配線パターンの形成方
法の主要工程における各状態を示す断面図である。この
方法では、まず、第2図へに示すように、下層基体fi
l上に、例えばシリコン酸化膜、シリコン窒化膜等でな
る第1の層間絶縁膜(2)を、例えば化学的気相成長法
またはスパッタ法によって形成する。この後、第1の層
間絶縁膜(2)上に、例えばスパック法を用いて、例え
ばアルミニウム膜でなる電極配線用金属膜(3)を形成
する。次に、第2図Bに示すように、感光性樹脂膜(4
)、例えば露光された部分が後の現像工程で除去される
ポジ型の感光性樹脂膜(4)を塗布する。続いて、第2
図Cに示すように、転写すべき電橋配線パターンが描か
れているマスク板(5)を介して破線矢印して示すよう
に光を照射することにより露光を行う。この後、現像工
程を経ると、露光された部分の感光性樹脂膜(4)が除
去されて、第2図りに示すような感光性樹脂膜パターン
(4a)が形成される。この後、化学的あるいは物理的
効果を利用したエツチング法を用いて露光部に対応する
電極配線用金属膜(3)を除去すると、第2図Eに示す
ように感光性樹脂膜パターン(4a)の下に電極金属配
線パターン(3a)が残り、さらに感光性樹脂膜パター
ン(4a)を除去すると、第2図Fに示すような電極金
属配線パターン(3a)が形成できる。この後、第2図
Gに示すように電極金属配線パターン(3a)上に第2
の層間絶縁膜(6)を形成して電極金属配線パターン(
3a)を保護し、多層配線構造の半導体装置の場合はさ
らにその上に図示しない電極配線用金属膜を形成して配
線パターンを形成する。
FIGS. 2A to 2G are cross-sectional views showing each state in the main steps of a conventional method for forming an electrode metal wiring pattern. In this method, first, as shown in FIG.
A first interlayer insulating film (2) made of, for example, a silicon oxide film or a silicon nitride film is formed on the first interlayer insulating film (2) by, for example, chemical vapor deposition or sputtering. Thereafter, an electrode wiring metal film (3) made of, for example, an aluminum film is formed on the first interlayer insulating film (2) by using, for example, a spackle method. Next, as shown in FIG. 2B, a photosensitive resin film (4
), for example, a positive photosensitive resin film (4) whose exposed portions are removed in a subsequent development step is applied. Next, the second
As shown in FIG. C, exposure is performed by irradiating light as indicated by the dashed arrow through a mask plate (5) on which the electric bridge wiring pattern to be transferred is drawn. Thereafter, through a development process, the exposed portions of the photosensitive resin film (4) are removed, and a photosensitive resin film pattern (4a) as shown in the second diagram is formed. Thereafter, when the metal film (3) for electrode wiring corresponding to the exposed area is removed using an etching method using chemical or physical effects, a photosensitive resin film pattern (4a) is formed as shown in FIG. 2E. An electrode metal wiring pattern (3a) remains under the pattern, and when the photosensitive resin film pattern (4a) is further removed, an electrode metal wiring pattern (3a) as shown in FIG. 2F can be formed. After this, as shown in FIG. 2G, a second layer is placed on the electrode metal wiring pattern (3a).
An interlayer insulating film (6) is formed to form an electrode metal wiring pattern (
3a), and in the case of a semiconductor device with a multilayer wiring structure, a metal film for electrode wiring (not shown) is further formed thereon to form a wiring pattern.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の1掻金属配線パターンの形成方法は、以上のよう
な工程から構成されているので、特に線幅3μm以下で
長さ100μm以上の長い電極金属配線パターンを形成
する際には、第1の層間絶縁膜(2)と電極配線用金属
膜(3)との密着力が弱いことに加え、第2の層間絶縁
# (61の形成時あるいは形成後の後工程の熱処理中
に第2の層間絶縁ill (61から電極金属配線パタ
ーン(3a)に対して応力が加わることなどにより電極
金属配線パターン(3a)が所定の位置よりずれてしま
い、最悪の場合には断線を引き起こして半導体装置の動
作の信頼性を低下させてしまう欠点があった。
The conventional method for forming a single metal wiring pattern consists of the steps described above, so when forming a long electrode metal wiring pattern with a line width of 3 μm or less and a length of 100 μm or more, the first In addition to the weak adhesion between the interlayer insulation film (2) and the metal film for electrode wiring (3), the second The electrode metal wiring pattern (3a) may shift from the predetermined position due to stress applied from the insulation ill (61) to the electrode metal wiring pattern (3a), and in the worst case, it may cause a disconnection and affect the operation of the semiconductor device. This had the drawback of reducing reliability.

この発明は上記のような問題点を解消するためになされ
たもので、電極金属配線パターンのずれおよび断線を防
止できる電極金属配線パターンの形成方法を得ることを
目的とする。
The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a method for forming an electrode metal wiring pattern that can prevent displacement and disconnection of the electrode metal wiring pattern.

〔問題点を解決するための手段〕[Means for solving problems]

この発明に係る電極金属配線パターンの形成方法は、第
1の層間絶縁膜のうちの電極金属配線パターンに対応す
る部分の一部にあらかじめ凹部を形成した後に、この凹
部の上に電極金属配線パターンを形成するようにしたも
のである。
The method for forming an electrode metal wiring pattern according to the present invention includes forming a recess in advance in a part of the first interlayer insulating film corresponding to the electrode metal wiring pattern, and then forming an electrode metal wiring pattern on the recess. It is designed to form a .

〔作  用〕[For production]

この発明における凹部は、電極金属配線パターンの一部
を嵌合することにより、電極金属配線パターンのずれお
よび断線を防止する。
The recess in this invention prevents displacement and disconnection of the electrode metal wiring pattern by fitting a part of the electrode metal wiring pattern.

〔実 施 例〕〔Example〕

以下、この発明の一実施例を図について説明する。第1
図A〜Lは、この発明の一実施例の主要工程での各状態
を示す断面図および平面図である。
An embodiment of the present invention will be described below with reference to the drawings. 1st
Figures A to L are a sectional view and a plan view showing each state in the main steps of an embodiment of the present invention.

この実施例の電極金属配線パターンの形成方法では、ま
ず、従来の方法と同様に、第1図Aに示すように、下層
基体+1)上に、例えばシリコン酸化膜、シリコン窒化
膜等でなる第1の層間絶縁膜(2)を、例えば化学的気
相成長法あるいはスパッタ法によって形成する。この後
、第1図Bに示すように、」二記第1の層間絶縁膜(2
)上に第1の感光性樹脂膜(7)、例えば露光した部分
以外が後の現像工程で除去されるネガ型の感光性樹脂膜
(力を塗布する。次に、第1図Cに示すように、転写す
べきパターンが描かれている第1のマスク板(8)を介
して光L’OO照射することにより露光を行う。この後
、現像工程を経ると、露光された部分以外の感光性樹脂
膜(7)が除去されて、第1図りに示すような感光性樹
脂膜(7)の開口(9)が形成される。続いて、この感
光性樹脂膜(7)のパターンをマスクとして化学的また
は物理的効果を利用したエツチング法を用いて、第1図
Eに示すように、上記開口(9)に露出した第1の層間
絶縁膜(2)の部分に凹部(lO)を形成する。
In the method of forming the electrode metal wiring pattern of this embodiment, first, as shown in FIG. The first interlayer insulating film (2) is formed by, for example, chemical vapor deposition or sputtering. After this, as shown in FIG. 1B, the first interlayer insulating film (2)
) is coated with a first photosensitive resin film (7), e.g. a negative photosensitive resin film (which is removed in a subsequent development process except for the exposed areas), as shown in Figure 1C. As shown in FIG. The photosensitive resin film (7) is removed to form an opening (9) in the photosensitive resin film (7) as shown in the first diagram.Subsequently, the pattern of this photosensitive resin film (7) is Using an etching method that utilizes chemical or physical effects as a mask, a recess (lO) is formed in the portion of the first interlayer insulating film (2) exposed in the opening (9), as shown in FIG. 1E. form.

この後、感光性樹脂膜(7)を除去すると、第1図Fに
示すような凹部(10)を有する第1の層間絶縁膜(2
)が得られる。
Thereafter, when the photosensitive resin film (7) is removed, a first interlayer insulating film (2) having a recess (10) as shown in FIG.
) is obtained.

ここにおいて、第1のマスク板(8)に描かれているパ
ターンは、後に用いる第2のマスク板(18)に描かれ
ている電極配線パターンの一部であるとする。また、凹
部(10)の深さは、この部分での断線を防ぐ意味から
、後に形成する電極配線用金属膜(1))の膜厚の2以
下程度が望ましい。
Here, it is assumed that the pattern drawn on the first mask plate (8) is part of the electrode wiring pattern drawn on the second mask plate (18) to be used later. Further, the depth of the recess (10) is desirably about 2 times or less the thickness of the electrode wiring metal film (1)) to be formed later, in order to prevent wire breakage at this portion.

凹部(10)の形成後、第1図Gに示すように、凹部(
10)を含む第1の層間絶縁II9[21の上に、例え
ばスパッタ法を用いて、例えばアルミニウム膜でなる電
極配線用金属膜(1))を形成した後、例えばポジ型の
感光性樹脂でなる第2の感光性樹脂膜(12)を塗布す
る。この後、従来の電極金属配線バターンの形成方法と
同様の方法を用いて、第1図H〜Jの順で処理を行うと
、凹部(10)において1よ第1図Kに示すような断面
を持つ電極金属配線パターン(lla)が形成される。
After forming the recess (10), as shown in FIG.
After forming an electrode wiring metal film (1) made of, for example, an aluminum film on the first interlayer insulation II9 [21 containing 10) using, for example, a sputtering method, the electrode wiring metal film (1)) made of, for example, an aluminum film is formed. A second photosensitive resin film (12) is applied. Thereafter, when the process is performed in the order of FIG. 1 H to J using the same method as the conventional electrode metal wiring pattern forming method, the cross section of the recess (10) from 1 to FIG. 1 K is formed. An electrode metal wiring pattern (lla) is formed.

なお、符号(12a)は、感光性樹脂膜パターンを示す
Note that the symbol (12a) indicates a photosensitive resin film pattern.

凹部(10)と電極金属配線パターン(lla)との位
置関係を示す平面図の例を第1図15に示す。第1図に
は、同図りにおけるA−A’線での断面図を示すことに
なる。
An example of a plan view showing the positional relationship between the recess (10) and the electrode metal wiring pattern (lla) is shown in FIG. 15. FIG. 1 shows a cross-sectional view taken along line AA' in the figure.

なお、上記実施例では1本の電極金属配線パターン(l
la)内に1個の凹部(10)を形成した場合を示した
が、1木の電極金属配線パターン内に複数個の凹部を形
成してもよい。
In addition, in the above embodiment, one electrode metal wiring pattern (l
Although a case is shown in which one recess (10) is formed within la), a plurality of recesses may be formed within one electrode metal wiring pattern.

また、上記実施例では電極配線用金属膜(1))として
アルミニウム膜を用いた場合を示したが、アルミニウム
に限らず電極配線用金属膜として用いられる材料であれ
ばどのようなものでも使用できAl5iCu、AlCu
などの合金膜であってもよい。
Furthermore, in the above embodiment, an aluminum film was used as the metal film (1) for electrode wiring, but not only aluminum, but any material that can be used as a metal film for electrode wiring can be used. Al5iCu, AlCu
It may also be an alloy film such as.

さらに、層間絶縁膜は1層である場合に限らず2層また
はそれ以上であってもよい。
Furthermore, the interlayer insulating film is not limited to one layer, but may be two or more layers.

また、凹部(lO)の形状は正方形に限らずいかなる形
状であってもよい。
Further, the shape of the recess (lO) is not limited to a square, but may be any shape.

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明によれば層間絶縁股上で電極金
属配線パターンを形成すべき部分の一部に凹部を形成し
た後、その上に電極金属配線パターンを形成するように
したので、長さ100 μm以上の長い配線パターンで
あっても、後の工程でのパターンのずれあるいは断線を
防ぐことができ、半導体装置の動作の信頼性を向上させ
ることができる。
As described above, according to the present invention, after forming a recess in a part of the interlayer insulation crotch where the electrode metal wiring pattern is to be formed, the electrode metal wiring pattern is formed thereon. Even with a long wiring pattern of 100 μm or more, it is possible to prevent pattern displacement or disconnection in subsequent steps, and it is possible to improve the reliability of the operation of the semiconductor device.

【図面の簡単な説明】[Brief explanation of drawings]

第1図A−Lはこの発明の一実施例による電極金属配線
パターンの形成方法の主要工程における各状態を示す断
面図および平面図、第2図A−Gは従来の電極金属配線
パターンの形成方法の主要工程における各状態を示す断
面図である。 +1)は下層基体、(2)は層間絶縁膜、(10)は凹
部、(1))は電極配線用金属膜、(lla)は電極金
属配線パターン。 なお、図中、同一符号は同一または相当部分を示す。
1A-L are cross-sectional views and plan views showing each state in the main steps of a method for forming an electrode metal wiring pattern according to an embodiment of the present invention, and FIGS. 2A-G are conventional methods for forming an electrode metal wiring pattern. FIG. 3 is a cross-sectional view showing each state in the main steps of the method. +1) is the lower substrate, (2) is the interlayer insulating film, (10) is the recess, (1)) is the metal film for electrode wiring, and (lla) is the electrode metal wiring pattern. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

Claims (2)

【特許請求の範囲】[Claims] (1)下層基体上に層間絶縁膜を介して所望の電極金属
配線パターンを形成する電極金属配線パターンの形成方
法において、上記層間絶縁膜にその上面から選択エッチ
ングを施し上記電極金属配線パターンの一部に対応する
部分に凹部を形成する第1の工程と、上記凹部を含めて
上記層間絶縁膜上に電極配線用の金属膜を形成する第2
の工程と、上記金属膜の上記凹部を含む上記電極金属配
線パターンを残して他の部分をエッチング除去する第3
の工程とを備えたことを特徴とする電極金属配線パター
ンの形成方法。
(1) In a method for forming an electrode metal wiring pattern in which a desired electrode metal wiring pattern is formed on a lower substrate via an interlayer insulating film, selective etching is performed on the interlayer insulating film from its upper surface to form a desired electrode metal wiring pattern on the interlayer insulating film. A first step of forming a recess in a portion corresponding to the recess, and a second step of forming a metal film for electrode wiring on the interlayer insulating film including the recess.
and a third step of etching away the other portions of the metal film, leaving the electrode metal wiring pattern including the recessed portions.
A method for forming an electrode metal wiring pattern, comprising the steps of:
(2)上記凹部の小さい方の幅を上記電極金属配線パタ
ーンの幅より狭くしたことを特徴とする特許請求の範囲
第1項記載の電極金属配線パターンの形成方法。
(2) The method for forming an electrode metal wiring pattern according to claim 1, wherein the width of the smaller recessed portion is narrower than the width of the electrode metal wiring pattern.
JP16652385A 1985-07-27 1985-07-27 Formation of electrode metal wiring pattern Pending JPS6226843A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16652385A JPS6226843A (en) 1985-07-27 1985-07-27 Formation of electrode metal wiring pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16652385A JPS6226843A (en) 1985-07-27 1985-07-27 Formation of electrode metal wiring pattern

Publications (1)

Publication Number Publication Date
JPS6226843A true JPS6226843A (en) 1987-02-04

Family

ID=15832892

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16652385A Pending JPS6226843A (en) 1985-07-27 1985-07-27 Formation of electrode metal wiring pattern

Country Status (1)

Country Link
JP (1) JPS6226843A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5209095A (en) * 1990-07-13 1993-05-11 Ube Industries, Ltd. Mill for producing strip and use thereof
US5416355A (en) * 1990-06-25 1995-05-16 Matsushita Electronics Corporation Semiconductor integrated circuit protectant incorporating cold cathode field emission

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5416355A (en) * 1990-06-25 1995-05-16 Matsushita Electronics Corporation Semiconductor integrated circuit protectant incorporating cold cathode field emission
US5209095A (en) * 1990-07-13 1993-05-11 Ube Industries, Ltd. Mill for producing strip and use thereof

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