JPH03152931A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To cut down the wiring delay time by a method wherein the stepped part of an interlayer insulating film caused by a lower layer is removed by isotropical etching process. CONSTITUTION:An oxide film 2 is formed on the surface of a semiconductor substrate 1; a lower layer Al wiring 3 is formed on the film 2; and then a lower layer interlayer insulating film 4 is deposited on the whole surface to cover the same. Next, the surface is coated with a photoresist 5 in the photo-sensitivity reverse to that of the photoresist used in case of forming the wiring 3. Then, the surface is exposed for development using the same photoresist as that used in case of forming the wiring 3 so as to form another photoresist mask making an opening only in the wiring 3. Next, the surface is isotropically etched away until the stepped part of the film 4 is removed to expose the surface of the wiring 3. Later, the resist 5 is removed. Next, an upper layer interlayer insulating film 6 is deposited on the whole surface to form an upper layer Al wiring layer 7 on the film 6. Through these procedures, the stepped part of the film 4 caused by the wiring 3 can be removed thereby almost flattening the surface of the film 6.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing a semiconductor device including a multilayer wiring formation process.

[Conventional technology]

FIG. 2 is a cross-sectional view of an example of a conventional semiconductor device.

An oxide film 2 is provided on the surface of a semiconductor substrate 1. On top of this, add A (
is deposited and etched using photolithography to form the lower Affl wiring 3. A lower interlayer insulating film 4 is deposited and insulated by a CVD method or the like, and Aρ is deposited thereon.
The upper layer A and wiring 7 are formed by etching.

[Problem to be solved by the invention]

In the conventional semiconductor device manufacturing method described above, a step is created in the upper layer Aj interconnect 7 due to a step in the lower interlayer insulating film 4 in the peripheral area of the lower layer Aρ interconnect 3, and the length of the upper layer Aρ interconnect is increased by the amount of the step. As a result, the wiring delay time between gates increases, and the upper layer A! 2 wiring 7
There are drawbacks such as the possibility of cutting.

[Means to solve the problem]

The method for manufacturing a semiconductor device of the present invention includes a step of forming a lower layer wiring via an insulating film on a semiconductor substrate on which a semiconductor element is formed, and a step of forming a lower interlayer insulating film with approximately the same thickness as the lower layer wiring over the entire surface. a step of depositing a photoresist mask having an opening only on the lower wiring;
A step of isotropically etching and removing the lower interlayer insulating film above the lower layer wiring using the mask, a step of depositing an upper interlayer insulating film on the entire surface, and forming an upper layer wiring on the upper interlayer insulating film. The process includes the steps of:

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIGS. 1(a) to 1(c) are cross-sectional views shown in the order of steps for explaining an embodiment of the present invention.

First, as shown in FIG. 1(a), an oxide film 2 is formed on the surface of a semiconductor substrate 1, a lower layer Aρ wiring 3 is formed thereon, and a lower interlayer insulating film 4 is deposited and covered. As shown in FIG. 1(b), a photoresist 5 having a photosensitive property opposite to that used for forming the lower layer A and C wirings is applied. For example, when a negative type photoresist is used to form the lower layer A and the Il wiring 3, a positive type photoresist is used as the photoresist 5. Then, exposure and development is performed using the photomask used when forming the lower layer Aρ wiring 3 to form a photoresist mask having openings only above the lower layer A and the & wiring 3. Next, isotropic etching is performed. Etching is performed until the surface of the lower Aρ wiring 3 is exposed, so that the level difference caused by the lower interlayer insulating film 4 is eliminated. After that,
Photoresist 5 is removed.

Next, as shown in FIG.
is deposited over the entire surface, and upper layer Affl wiring 7 is formed thereon.

In this way, the level difference in the lower interlayer insulating film 4 caused by the lower Aρ wiring 3 is almost eliminated, and the surface of the upper interlayer insulating film 6 becomes almost flat.

〔Effect of the invention〕

As explained above, since the present invention eliminates the level difference in the glabellar insulating film caused by the lower layer wiring, the upper layer wiring can be formed on a flat glabella insulating film, thereby shortening the wiring length of the upper layer wiring. This has the effect of reducing wiring delay time and eliminating disconnections in upper layer wiring due to sharp steps.

[Brief explanation of the drawing]

FIGS. 1(a) to 1(c) are cross-sectional views showing an example of the present invention in the order of steps, and FIG. 2 is a cross-sectional view of an example of a conventional semiconductor device. 1... Semiconductor substrate, 2... Oxide film, 3... Lower layer A
ρ wiring, 4... Lower interlayer insulating film, 5... Photoresist, 6... Upper interlayer insulating film, 7... Upper layer Al wiring.

Claims (1)

[Claims] A step of forming a lower layer wiring via an insulating film on a semiconductor substrate on which a semiconductor element is formed, a step of depositing a lower interlayer insulating film of approximately the same thickness as the lower layer wiring over the entire surface, and a step of depositing a lower layer interlayer insulating film on the entire surface of the lower layer wiring. a step of forming a photoresist mask having an opening, a step of isotropically etching and removing the lower interlayer insulating film above the lower wiring using the mask, and depositing an upper interlayer insulating film over the entire surface. process and
A method for manufacturing a semiconductor device, comprising the step of forming an upper layer wiring on the upper interlayer insulating film.