JPS63133646A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent a reflected light from the lower surface of a photoresist film from being irregularly reflected into the photoresist film and facilitate forming a fine aperture of a diameter less than 1mum in the photoresist film with a high accuracy by patterning in a combination of a low reflectance film formed on the interlayer insulation film and a photoresist film formed thereon. CONSTITUTION:A lower wiring layer 3 is formed on a semiconductor substrate 1 and a layer insulating film 4 which covers the wiring layer 3 is formed and a low light reflectance film 5 is formed on the layer insulating film 4. Then a photoresist film 6 is formed on the low light reflectance film 5 and patterned. An aperture 8 is formed in the low light reflectance film 5 and the layer insulating film 4 with the patterned photoresist film 6 as a mask. Then, after the photoresist film 6 is removed, a metal film 9 is formed on the low light reflectance film 5 and in the aperture 8. The metal film 9 and the low light reflectance film 5 are selectively etched to form an upper wiring layer 10. For instance, the polycrystalline silicon film 5 is formed as the low light reflectance film and, after the aluminum film 9 and the polycrystalline silicon film 5 are selectively etched and removed, a heat treatment is carried out to form a wiring layer 10 of aluminum-silicon alloy.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for manufacturing a semiconductor device in which multilayer wiring is provided.

[Conventional technology]

Multilayering of wiring has been adopted as one way to improve the degree of integration of integrated circuits formed in semiconductor devices.

A reduction projection exposure method is generally used as a lithography technique for forming a v&fine pattern, and is expected to continue to be widely used in the future.

In a conventional method for manufacturing a semiconductor device, first, a lower wiring layer is formed on a semiconductor substrate, and a glabella insulating film is formed to cover the lower wiring layer. Next, a photoresist film is formed on the interlayer insulating film and patterned. Next, using the patterned photoresist film as a mask, an opening is provided in the interlayer insulating film, and then the photoresist film is removed;
A metal film is selectively formed on the interlayer insulating film and in the opening to form an upper wiring layer.

[Problem that the invention seeks to solve]

In the conventional semiconductor device manufacturing method described above, when a pattern is exposed on a photoresist film using a reduction projection exposure method, the pattern image transmitted through the glabella insulating film is reflected from the surface of the underlying wiring layer, resulting in photoresist 1 to plJ. , the precision of the openings in the photoresist obtained by developing the photoresist becomes poor, making it difficult to form openings of 1 μm x 1 μm square or less.

[Means for solving problems]

The method for manufacturing a semiconductor device of the present invention includes the steps of forming a lower wiring layer on a semiconductor substrate, forming an interlayer insulating film covering the lower wiring layer, and forming a low light reflectance film on the interlayer insulating film. forming a photoresist film on the low light reflectance film and patterning it; and forming an opening in the low light reflectance film and the interlayer insulating film using the patterned photoresist film as a mask. a step of forming a metal film on the low light reflectance film and in the opening after removing the resist film; and selectively etching the metal film and the low light reflectance film. and forming an upper wiring layer.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIGS. 1A to 1G are cross-sectional views of a semiconductor chip shown in the order of steps for explaining a first embodiment of the present invention.

First, as shown in FIG. 1(a), a silicon substrate 1 whose main surface is covered with a silicon oxide film 2 and has openings provided at predetermined positions.
A lower aluminum wiring layer 3 is selectively formed thereon.

The silicon substrate in case 2 also includes one on which a semiconductor element is formed.

Next, as shown in FIG. 1(b), a silicon nitride film 4 is formed by plasma CVD so as to cover the aluminum wiring layer 3 on the silicon oxide film 2.

Next, as shown in FIG. 1(c), a polycrystalline silicon film with a thickness of about 50 nm is formed as a low light reflectance film on the silicon nitride film 4 by high-pressure low pressure CVD.

Next, as shown in FIG. 1(d), a polycrystalline silicon film 5
After forming a photoresist film 6 on the photoresist film 6, a pattern is exposed on the photoresist film 6 using a reduction projection exposure method, and the pattern is developed to form an opening 7 in the photoresist film 6. In this way, by providing a film with a low light reflectance such as a polycrystalline silicon film on the photoresist, it is possible to prevent undesirable exposure due to light that is diffusely reflected from the bottom surface of the photoresist film and re-enter the photoresist film, thereby creating a highly accurate photoresist film. pattern can be obtained.

Next, as shown in FIG. 1(e), using the photoresist film 6 with the openings 7 as a mask, openings 8 are formed in the polycrystalline silicon film 5 and the silicon nitride film 4 to reach the underlying wiring layer. After that, the photoresist film 6 is removed.

Next, as shown in FIG. 1(f), after forming an aluminum film 9 on the opening 8 and the polycrystalline silicon film 5 by sputtering, the aluminum film 9 and the polycrystalline silicon film 5 are selected. Remove by etching.

Next, as shown in Figure 1 (g>), in order to ensure contact between the wiring layers and stabilize the device characteristics,
A heat treatment is performed at a temperature of 500° C. for 10 to 60 minutes to form an aluminum-silicon alloy wiring layer 10.

FIGS. 2(a) and 2(b) are cross-sectional views of a semiconductor chip shown in order of steps for explaining a second embodiment of the present invention.

As shown in FIG. 2(a), the second embodiment uses a chromium oxide film 11 as a low light reflectance film. After forming the chromium oxide film 11, the photoresist film 6 formed on the chromium oxide film 11 is patterned in the same manner as in the first embodiment.

Next, as shown in FIG. 2(b), openings are formed in the chromium oxide film 11 and the silicon nitride film 4 using the patterned photoresist film 6 as a mask, and after the photoresist film is removed, the underlying wiring layer and An upper wiring layer 9 is selectively formed to make contact through the opening. In the second embodiment, the interlayer insulating film is made of silicon nitride film 4 and chromium oxide II.
It becomes a double layer with y and 11.

〔Effect of the invention〕

As explained above, in the present invention, by patterning a combination of a low light reflectance film formed on an interlayer insulating film and a photoresist film formed on the low light reflection film, reflected light from the lower surface of the photoresist film is removed. This has the effect of suppressing the diffuse reflection of light onto the photoresist film, and making it possible to accurately form fine openings of 1 μm×1 μm square or less in the photoresist films 1 to 1.

In addition, the polycrystalline silicon film formed as a low light reflectance film does not need to be removed, and when combined with the aluminum film of the upper wiring layer, it becomes an aluminum-silicon alloy wiring layer through subsequent heat treatment, and is heat resistant without alloy spikes. This has the effect that a wiring layer with good properties can be formed. In addition, when a chromium oxide film is used as a low light reflectance film, it is possible to form a photoresist mask with an extremely low light reflectance and a higher precision than when using a polycrystalline silicon film. It also has a positive effect on the patterning process when overlapping.

[Brief explanation of the drawing]

FIGS. 1(a) to (g) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining the first embodiment of the present invention, and FIGS. 1 is a cross-sectional view of a semiconductor chip shown in the order of steps for explaining an embodiment of the present invention. 1... silicon substrate, 2... silicon oxide film, 3...
Lower aluminum wiring layer, 4... silicon nitride film, 5.
... Polycrystalline silicon film, 6... Photoresist film, 7.
... Openings in photoresist film, 8... Openings in polycrystalline silicon film and silicon nitride film, 9... Upper aluminum wiring layer, 10... Aluminum-silicon alloy wiring layer, 11... Chromium oxide film.

Claims (1)

[Claims] forming a lower wiring layer on a semiconductor substrate and forming an interlayer insulating film covering the lower wiring layer; forming a low light reflectance film on the interlayer insulating film; and forming a low light reflectance film on the interlayer insulating film. forming and patterning a photoresist film on the film; using the patterned photoresist film as a mask to form openings in the low light reflectance film and the interlayer insulating film; and removing the photoresist film. and then forming a metal film on the low light reflectance film and in the opening, and selectively etching the metal film and the low light reflectance film to form an upper wiring layer. A method for manufacturing a semiconductor device, characterized by: