JPS62247523A - Manufacturing method of semiconductor device - Google Patents
Manufacturing method of semiconductor deviceInfo
- Publication number
- JPS62247523A JPS62247523A JP9028386A JP9028386A JPS62247523A JP S62247523 A JPS62247523 A JP S62247523A JP 9028386 A JP9028386 A JP 9028386A JP 9028386 A JP9028386 A JP 9028386A JP S62247523 A JPS62247523 A JP S62247523A
- Authority
- JP
- Japan
- Prior art keywords
- film
- resist film
- pattern
- resist
- patterned
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims description 10
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 238000000034 method Methods 0.000 claims description 13
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- 229920005989 resin Polymers 0.000 claims description 5
- 239000011347 resin Substances 0.000 claims description 5
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 5
- 239000003513 alkali Substances 0.000 claims description 4
- 238000000059 patterning Methods 0.000 claims description 4
- 239000011521 glass Substances 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 6
- 239000000758 substrate Substances 0.000 description 6
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 description 6
- 239000000463 material Substances 0.000 description 4
- 230000007261 regionalization Effects 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 229910052681 coesite Inorganic materials 0.000 description 3
- 229910052906 cristobalite Inorganic materials 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 229910052682 stishovite Inorganic materials 0.000 description 3
- 229910052905 tridymite Inorganic materials 0.000 description 3
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 2
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 2
- 239000012670 alkaline solution Substances 0.000 description 2
- 229910001882 dioxygen Inorganic materials 0.000 description 2
- 229910052731 fluorine Inorganic materials 0.000 description 2
- 239000011737 fluorine Substances 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- FFUAGWLWBBFQJT-UHFFFAOYSA-N hexamethyldisilazane Chemical compound C[Si](C)(C)N[Si](C)(C)C FFUAGWLWBBFQJT-UHFFFAOYSA-N 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- 239000005368 silicate glass Substances 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- OEYIOHPDSNJKLS-UHFFFAOYSA-N choline Chemical compound C[N+](C)(C)CCO OEYIOHPDSNJKLS-UHFFFAOYSA-N 0.000 description 1
- 229960001231 choline Drugs 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 238000009736 wetting Methods 0.000 description 1
Landscapes
- Photosensitive Polymer And Photoresist Processing (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
［概要コ
有機シリコン樹脂膜あるいは酸化シリコン膜を主材にし
た膜の表面をアルカリ処理した後、レジスト膜を塗布し
てパターンニングする。[Detailed Description of the Invention] [Summary] After the surface of a film whose main material is an organic silicon resin film or a silicon oxide film is treated with alkali, a resist film is applied and patterned.
そうすると、レジスト膜との密着性が向上する。This improves the adhesion with the resist film.
［産業上の利用分野］
本発明は半導体装置の製造方法に係り、特に、パターン
ニング方法に関する。[Industrial Field of Application] The present invention relates to a method for manufacturing a semiconductor device, and particularly to a patterning method.
ｔＣなど、半導体装置の製造方法において、最も重要な
プロセスの一つにパターンを写真食刻法を用いる、所謂
リソグラフィ技術があり、現在、ＩＣが微細化され、高
集積化されてきた背景には、このリソグラフィ技術の進
歩が大きく貢献している。One of the most important processes in the manufacturing method of semiconductor devices such as tC is the so-called lithography technology that uses photolithography to create patterns. , advances in lithography technology have made a major contribution.
しかし、ＩＣが高集積化する程、基板表面での凹凸が増
えて段差のある領域でのパターン形成が増加しており、
その領域での微細で、且つ、高精度なパターンの形成が
要望されている。However, as ICs become more highly integrated, the irregularities on the substrate surface increase and pattern formation in stepped areas increases.
There is a demand for forming fine and highly accurate patterns in that area.
［従来の技術と発明が解決しようとする問題点コ従来、
段差部にレジスト膜パターンを形成すると、凹部と凸部
とではレジスト膜の膜厚が異なり、これを露光・現像す
れば凹部と凸部とのパターン幅が違ってくる等、高精度
にパターンニングできない問題があった。即ち、両方を
同時に露光すると、凹部上の膜厚の厚いレジスト膜部分
は露光不足になって、現像すればレジスト膜パターンの
幅が狭くなり、凸部上の膜厚の薄いレジスト膜部分は露
光過度になって、現像すればレジスト膜パターンの幅が
広くなる。第３図（ａ）および（ｂ）はそれを示す平面
図と断面図で、段差のある半導体基板１上に形成したネ
ガレジスト膜パターン２を例示している。[Problems that conventional techniques and inventions try to solve
When a resist film pattern is formed on a stepped part, the thickness of the resist film differs between the concave part and the convex part, and if this is exposed and developed, the pattern width of the concave part and the convex part will be different, making it possible to pattern with high precision. There was a problem that I couldn't do it. In other words, if both are exposed at the same time, the thicker resist film portions on the concave portions will be underexposed, and when developed, the width of the resist film pattern will become narrower, and the thinner resist film portions on the convex portions will be underexposed. If it becomes excessive and is developed, the width of the resist film pattern will become wider. FIGS. 3(a) and 3(b) are a plan view and a cross-sectional view illustrating a negative resist film pattern 2 formed on a semiconductor substrate 1 having steps.
詳しくは、露光波長とレジスト膜厚とが関連して、パタ
ーン幅は一定しないが、概念的には上記に説明したよう
に、レジスト膜パターンの幅がその膜厚に比例して変わ
るものである。Specifically, the pattern width is not constant due to the relationship between the exposure wavelength and the resist film thickness, but conceptually, as explained above, the width of the resist film pattern changes in proportion to its film thickness. .
そこで、段差のある部分には、例えば、３層のレジスト
膜パターンを形成するパターンニング方法が考案された
。第４図ば３層レジスト膜３，４゜５のパターンを半導
体基板１上に形成した工程断面を示している。即ち、半
導体基板１の直ぐ上には、平坦化するためのレジスト膜
３を平坦になるまで厚く塗布する。且つ、要すれば、レ
ジスト膜３は最上層のレジスト膜５の露光波長を吸収す
るような材質のレジストが望ましく、そうすれば、パタ
ーン精度が一層向上する。次いで、その上に形成する中
間膜４は、レジスト膜３とはエツチング比が大きく異な
る材質のもの、例えば、有機シリコン樹脂（スピンオン
グラス：５ＯＧ）膜を被着する。次いで、最上層のレジ
スト膜５は微細パターンの形成できる高感度・高解像度
のレジストを使用する。Therefore, a patterning method has been devised in which, for example, a three-layer resist film pattern is formed on the stepped portion. FIG. 4 shows a cross-sectional view of a process in which a pattern of three-layer resist films 3, 4.degree. 5 is formed on a semiconductor substrate 1. As shown in FIG. That is, immediately above the semiconductor substrate 1, a resist film 3 for planarization is applied thickly until it becomes flat. In addition, if necessary, it is desirable that the resist film 3 is made of a material that absorbs the exposure wavelength of the uppermost resist film 5, thereby further improving pattern accuracy. Next, the intermediate film 4 formed thereon is made of a material whose etching ratio is significantly different from that of the resist film 3, for example, an organic silicon resin (spin-on glass: 5OG) film. Next, for the uppermost resist film 5, a high-sensitivity, high-resolution resist capable of forming fine patterns is used.
そして、まず、レジスト膜５のパターンを形成した後、
そのレジスト膜５のパターンをマスクにして、中間膜４
をエツチングし、更に、中間膜４をマスクにしてレジス
ト膜３をエツチングしてパターンを転写する。例えば、
中間膜４をＳＯＧ膜とすると、弗素系ガスでエツチング
して、ＳｏＧ膜をパターンニングし、そのＳＯＧ膜をマ
スクとしてレジスト膜３を酸素ガスでプラズマエツチン
グしてパターンを転写する。実際上には、レジスト膜３
のパターン形成工程に、最上層のレジスト膜５は消滅し
てなくなることが多い。First, after forming a pattern of the resist film 5,
Using the pattern of the resist film 5 as a mask, the intermediate film 4
Then, using the intermediate film 4 as a mask, the resist film 3 is etched to transfer the pattern. for example,
When the intermediate film 4 is an SOG film, the SoG film is patterned by etching with fluorine gas, and the pattern is transferred by plasma etching the resist film 3 with oxygen gas using the SOG film as a mask. Actually, the resist film 3
During the pattern forming process, the uppermost resist film 5 often disappears.
このように、多層レジスト膜パターンを形成する場合に
は、エツチング比の異なる材質のものを積層しており、
その中間層には有機シリコン樹脂が用いられている。In this way, when forming a multilayer resist film pattern, materials with different etching ratios are laminated.
An organic silicone resin is used for the intermediate layer.
しかし、有機シリコン樹脂はレジストとの濡れが悪くて
、密着性が十分でなく、上記のパターン転写中に剥がれ
易い欠点があり、第４図の矢印にその剥がれを図示して
いる。However, the organosilicon resin has a drawback that it has poor wettability with the resist, does not have sufficient adhesion, and is easily peeled off during pattern transfer, and this peeling is illustrated by the arrow in FIG. 4.
また、多層レジスト膜ではなくても、酸化シリコンを主
体にした膜、例えば、酸化シリコン（Ｓｉ０２）膜や燐
シリケートガラス（Ｐ Ｓ Ｇ）膜などの上に、レジス
ト膜を塗布してパターンニングする１層のレジスト膜パ
ターンの形成工程は、従前から汎用されている。しかし
、このような絶縁膜もレジスト膜との密着性が悪く、そ
のために、パターン精度が損なわれると云う問題がある
。In addition, even if it is not a multilayer resist film, a resist film can be applied and patterned on a film mainly made of silicon oxide, such as a silicon oxide (Si02) film or a phosphorous silicate glass (PSG) film. The process of forming a single-layer resist film pattern has been widely used for some time. However, such an insulating film also has poor adhesion with the resist film, which causes a problem in that pattern accuracy is impaired.
本発明は、このような問題点を解決して、高精度に微細
パターンが形成できるパターンの形成方法を提案するも
のである。The present invention solves these problems and proposes a pattern forming method that can form fine patterns with high precision.
［問題点を解決するための手段１
その問題は、有機シリコン樹脂膜、酸化シリニ２ン膜、
又はシリコンガラス膜のいずれかからなる被パターンニ
ング膜の上に、レジスト膜を塗布してパターンニングす
るパターン形成工程において、前記被パターンニング膜
の表面をアルカリ処理する工程が含まれる半導体装置の
製造方法によって解決される。[Means for solving the problem 1 The problem is that organic silicon resin film, silicon oxide film,
or manufacturing a semiconductor device, which includes a step of alkali-treating the surface of the patterned film in a pattern forming step of applying and patterning a resist film on a patterned film made of either a silicon glass film. Solved by method.
［作用］
即ち、本発明は、ＳＯＧ膜、５ＬＯ２膜、ＰＳＧ膜や硼
素シリケートガラス（Ｂ Ｓ Ｇ）膜の表面をアルカリ
処理し、その後にレジスト膜を塗布してレジスト膜のパ
ターン形成する。[Operation] That is, in the present invention, the surface of an SOG film, 5LO2 film, PSG film, or boron silicate glass (BSG) film is treated with alkali, and then a resist film is applied to form a pattern of the resist film.
そうすると、レジスト膜との濡れが良くなって、密着性
が向上する。This improves wetting with the resist film and improves adhesion.
［実施例］ 以下、図面を参照して実施例によって詳細に説明する。[Example] Hereinafter, embodiments will be described in detail with reference to the drawings.
第１図（ａ）〜（Ｃ１は本発明にかかる３層レジスト膜
パターンの形成工程順断面図を示しており、まず、同図
（ａｌに示すように、段差のある半導体基板１１上に平
坦化用のレジスト膜１３（膜厚１〜３μｍ）を塗布して
、更に、その上にＳＯＧ膜１４（膜厚数千人程度）を塗
布する。そして、このＳＯＧ膜１４を加熱してキュアし
た後、有機系アルカリ液に浸漬し、次に、水洗する。こ
れがアルカリ処理である。FIGS. 1(a) to (C1) show cross-sectional views in the order of the formation process of a three-layer resist film pattern according to the present invention. First, as shown in FIG. A resist film 13 (film thickness of 1 to 3 μm) for chemical conversion is applied, and then an SOG film 14 (film thickness of about several thousand layers) is applied thereon.Then, this SOG film 14 is heated and cured. After that, it is immersed in an organic alkaline solution, and then washed with water.This is alkaline treatment.
この有機系アルカリ液は、例えば、テトラメチルアンモ
ニウムハイドロオキサイド（ＴＭＡＨＯ）やコリンなど
で、ポジレジストの現像液として知られているものであ
るが、この水溶液中には、ＯＨ−が解離しており、この
ＯＨ−がＳｔに作用して、ＳＯＧ膜の表面を改質する。This organic alkaline solution is made of, for example, tetramethylammonium hydroxide (TMAHO) or choline, and is known as a positive resist developer, but OH- is dissociated in this aqueous solution. , this OH- acts on St to modify the surface of the SOG film.
ここに、ＴＭＡ）ＩＯの構造式は（ＣＨ３） ４ Ｎｏ
旺。Here, the structural formula of TMA)IO is (CH3) 4 No
Want.
パターン形成用のレジスト膜１５（膜厚１μｍ）を塗布
し、露光、現像して、パターンを形成する。A resist film 15 (thickness: 1 μm) for pattern formation is applied, exposed, and developed to form a pattern.
そうすると、ＴＭＡＨＯで処理したＳＯＧ膜１４の表面
は、レジスト膜１５との密着性が極めて良く、高精度な
レジスト膜１５のパターンが形成される。Then, the surface of the SOG film 14 treated with TMAHO has extremely good adhesion with the resist film 15, and a highly accurate pattern of the resist film 15 is formed.
次いで、同図（Ｃ１に示すように、レジスト膜１５をマ
スクにして、ＳＯＧ膜１４を弗素系ガスでエツチングし
てパターンニングし、そのＳＯＧ膜１４をマスクにして
レジスト膜１３を酸素ガスでリアクティブイオンエツチ
ングしてパターンを形成する。この時、レジスト膜１５
は消滅してしまうことが多い。Next, as shown in the same figure (C1), using the resist film 15 as a mask, the SOG film 14 is etched and patterned with fluorine gas, and using the SOG film 14 as a mask, the resist film 13 is etched with oxygen gas. A pattern is formed by active ion etching.At this time, the resist film 15
often disappear.
かくすれば、高精度なレジスト膜パターンを形成するこ
とができる。In this way, a highly accurate resist film pattern can be formed.
また、第２図（ａ）〜（Ｃ）は本発明にかかる他のレジ
スト膜パターンの形成工程順断面図を示している。Moreover, FIGS. 2(a) to 2(C) show sequential cross-sectional views of the formation process of another resist film pattern according to the present invention.
本例は、同図（ａｌに示すように、半導体基板１１上に
５ｉ０２膜１２が形成されており、それを１層のレジス
ト膜パターンでパターンニングする例であるが、まず、
５ｉ０２膜１２の表面を上記例と同様にアルカリ処理し
、次に−へキサメチレンジシラザラン（ＨＭＤＳ）処理
をおこなう。ＨＭＤＳ処理は表面に（ＣＨ３） ３ Ｓ
ｔを付着する処理で、更にレジスト膜との密着性が良く
なる処理である。In this example, as shown in the same figure (al), a 5i02 film 12 is formed on a semiconductor substrate 11, and it is patterned with a single layer resist film pattern.
The surface of the 5i02 film 12 is treated with alkali in the same manner as in the above example, and then treated with -hexamethylene disilazalane (HMDS). HMDS treatment on the surface (CH3)3S
This is a process of attaching t to further improve the adhesion with the resist film.
次いで、第２図（ｂｌに示すように、微細パターン形成
用のレジスト膜１６を被着し、露光、現像する。Next, as shown in FIG. 2 (bl), a resist film 16 for forming a fine pattern is deposited, exposed, and developed.
次いで、同図（Ｃ１に示すように、レジスト膜１６をマ
スクにして、ＳｉＯ２膜１２をエツチングしてパターン
ニングすると、現像処理中にレジスト膜１６の剥がれが
な（，５ｉ０２膜パターンを高精度に形成することがで
きる。Next, as shown in the same figure (C1), using the resist film 16 as a mask, the SiO2 film 12 is etched and patterned. can be formed.
尚、前記の第１図に説明した実施例においても、このＨ
ＭＤＳ処理を追加すれば、密着性は更に良くなる。Note that this H
Adhesion can be further improved by adding MDS treatment.
［発明の効果］
上記説明から明らかなように、本発明によればレジスト
膜の密着性が改善されて、高精度な微細パターンの形成
に極めて有効なものである。[Effects of the Invention] As is clear from the above description, the present invention improves the adhesion of the resist film and is extremely effective in forming highly accurate fine patterns.
第１図（ａ）〜（Ｃ）および第２図（ａ）〜（Ｃ）ば本
発明にかかる実施例の形成工程順断面図、
第３図（ａ）、 （ｂｌは従来の１層のレジスト膜パタ
ーン形成の平面図と断面図、
第４図は従来の３層のレジスト膜パターン形成の断面図
である。
図において、
１．１１しよ半導体基板、
２．３．５はレジスト膜、
４は中間膜、
１２はＳｉＯ２膜、
１３、１５．１６はレジスト膜、
１４はＳＯＧ膜、
、杢、イ＠ｇＲ＋−，，−ｏ−ｔｙ３３７４ｉし以ＦＨ
ＩＡ’ｌ−ツリ＠＊Ｉ’ｆ’ｉＭ第１図
しｆ発ＣＩＭＩ＝Ｗ−？ｋｌ！：ｆｆｉし”、□’４１
１／ｉ７− ソ＠ｉｌ：ｆ’Ｅ”ｌｆ２０ゴ第２図FIGS. 1(a) to (C) and FIGS. 2(a) to (C) are cross-sectional views in the order of the formation steps of the embodiment according to the present invention. A plan view and a cross-sectional view of resist film pattern formation. Fig. 4 is a cross-sectional view of conventional three-layer resist film pattern formation. In the figure, 1.11 is a semiconductor substrate, 2.3.5 is a resist film, 4 is an intermediate film, 12 is a SiO2 film, 13, 15.16 is a resist film, 14 is a SOG film,
IA'l-Tree @*I'f'iM Figure 1 and f CIMI=W-? kl! :ffi", □'41
1/i7- So@il:f'E”lf20go Figure 2
Claims (1)
ラス膜のいずれかからなる被パターンニング膜の上に、
レジスト膜を塗布してパターンニングするパターン形成
工程において、前記被パターンニング膜の表面をアルカ
リ処理する工程が含まれてなることを特徴とする半導体
装置の製造方法。On a film to be patterned consisting of an organic silicon resin film, a silicon oxide film, or a silicon glass film,
A method for manufacturing a semiconductor device, characterized in that a pattern forming step of applying and patterning a resist film includes a step of treating the surface of the film to be patterned with an alkali.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9028386A JPS62247523A (en) | 1986-04-18 | 1986-04-18 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9028386A JPS62247523A (en) | 1986-04-18 | 1986-04-18 | Manufacturing method of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62247523A true JPS62247523A (en) | 1987-10-28 |
| JPH058856B2 JPH058856B2 (en) | 1993-02-03 |
Family
ID=13994187
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9028386A Granted JPS62247523A (en) | 1986-04-18 | 1986-04-18 | Manufacturing method of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62247523A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005005602A (en) * | 2003-06-13 | 2005-01-06 | Semiconductor Energy Lab Co Ltd | Surface treatment method and semiconductor device manufacturing method |
| JP2012059924A (en) * | 2010-09-09 | 2012-03-22 | Lapis Semiconductor Co Ltd | Formation method of photosensitive resist pattern and manufacturing method of semiconductor device |
| JP2017194588A (en) * | 2016-04-21 | 2017-10-26 | Hoya株式会社 | Surface treatment method, method for manufacturing mask blank and method for manufacturing transfer mask |
-
1986
- 1986-04-18 JP JP9028386A patent/JPS62247523A/en active Granted
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005005602A (en) * | 2003-06-13 | 2005-01-06 | Semiconductor Energy Lab Co Ltd | Surface treatment method and semiconductor device manufacturing method |
| US7449408B2 (en) * | 2003-06-13 | 2008-11-11 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
| JP4524774B2 (en) * | 2003-06-13 | 2010-08-18 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
| JP2012059924A (en) * | 2010-09-09 | 2012-03-22 | Lapis Semiconductor Co Ltd | Formation method of photosensitive resist pattern and manufacturing method of semiconductor device |
| JP2017194588A (en) * | 2016-04-21 | 2017-10-26 | Hoya株式会社 | Surface treatment method, method for manufacturing mask blank and method for manufacturing transfer mask |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH058856B2 (en) | 1993-02-03 |
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