JPH0722506A - Semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE:To simplify a process for patterning by using a silicone polymer film having photosensitivity and heat resistance as a layer insulating film for wiring. CONSTITUTION:An AlSi alloy is sputtered on a substrate 1 where a silicon oxide film 2 was formed, patterning is performed by photolithography, thereby forming a first wiring layer 3. Then, a heat treatment is given by applying an anisole solution of polymethylvinylsesquioxan indicated by a chemical formula (HO)2(Si2O3R2)nH2 to the substrate 1, thereby forming a resin film 5. Next, a contact hole 6 is formed by photolithography and then an interlayer film 5a is formed. At that time, the resin film 5 itself has a photosensitivity so that other photoresist becomes unnecessary. Moreover, the AlSi alloy is spattered and a second wiring layer 8 is formed, which layer is to be connected to the first wiring layer 3 through the contact hole 6. A flat interlayer film having no level difference of a wiring layer can be formed in a simplified process.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a multilayer wiring structure,
The present invention relates to a semiconductor device having an interlayer flattening film and a manufacturing method thereof.

[0002]

2. Description of the Related Art When forming a multi-layer wiring structure, it is necessary for an interlayer film formed between wiring layers to insulate upper and lower wiring layers and to flatten the lower wiring layer. FIG. 4 is a cross-sectional view showing the formation of an interlayer film between wiring layers of a conventional semiconductor device in the order of steps. In the figure, 41 is a substrate made of a semiconductor, 42 is a silicon oxide film formed by a CVD method,
Reference numeral 43 is a first wiring layer formed on the silicon oxide film. Here, active elements such as transistors to be connected to the first wiring layer 43 are omitted and not shown.

The manufacturing process will be described below. First, Al is formed on the substrate 41 on which the silicon oxide film 42 is formed.
A Si alloy is deposited by sputtering, and as shown in FIG. 4A, this is patterned by photolithography to form a first wiring layer 43. Next, FIG.
As shown in (b), a silicon oxide film 44 is formed on the surface by a CVD method, and then SOG is applied to form an SOG film 45 as shown in FIG.
The step difference of the wiring layer 43 is reduced.

Next, as shown in FIG. 4D, a resist pattern 46 is formed by a photolithography technique, and etching is performed using the resist pattern 46 as a mask. As a result, as shown in FIG. 4E, the SOG film 45 is formed. And a contact hole 47 in a predetermined area of the silicon oxide film 44.
To form. Then, as shown in FIG. 4F, after removing the resist pattern 46, an AlSi alloy is deposited thereon by sputtering to form a metal film 48, and thereafter, the metal film 48 is formed by photolithography and etching. Patterning is performed to form a second wiring layer that is electrically connected to the first wiring layer 43 through the contact hole 47.

[0005]

Since the prior art is constructed as described above, there are the following problems. First, the interlayer insulating film between the wiring layers in the multilayer wiring is limited by the heat resistance of the lower wiring layer.
An insulating film (silicon oxide film) deposited and formed by the VD method or the like is used. Therefore, steps such as photoresist coating and peeling are required for patterning the interlayer insulating film, resulting in a long process. There was a problem. (Reference: Japanese Patent Publication No. 51-44871, Japanese Patent Laid-Open No. 56-12.
5855, JP-A-56-125856, JP-A-56-125857)

Further, since it is difficult to flatten the steps of the underlying wiring layer only by the silicon oxide film formed by the CVD method, the SOG coating film is also used for the flattening to improve the reliability of the upper wiring layer. , It has prevented the deterioration of pattern accuracy. Due to the presence of the unevenness, the wiring layer is likely to be broken, so that it is necessary to sufficiently flatten the surface. However, SO
When G is applied once, planarization is insufficient, and it has to be applied twice or more, which increases the number of steps. If the SOG layer is exposed on the side wall of the contact hole after the contact hole is opened, the dehydration condensation reaction between the hydroxyl groups in SOG, which has poor heat resistance, proceeds in the subsequent heat treatment step.
Degassing occurs from this exposed portion, the wiring layer is corroded (poisoned via), and the reliability is significantly reduced.

The present invention has been made in order to solve the above problems, and in a simplified process, the wiring layer is flattened so as to eliminate the step, and the wiring layer causes a problem such as corrosion. The purpose is not to.

[0008]

A semiconductor device of the present invention is formed on a wiring layer and has a chemical formula of (HO) ₂ (Si ₂ O
₃ R ₂ ) _n H ₂ and a side chain R of the chemical formula is a ladder structure composed of a lower alkyl group and an alkenyl group which is a monovalent unsaturated atomic group having one carbon double bond in the molecular chain. It is characterized in that it has an interlayer film composed of the silicone ladder polymer, and the alkenyl group occupies 2 to 50 mol% of the side chain R.

Further, in the method of manufacturing a semiconductor device of the present invention, a step of forming a wiring layer and a chemical formula of (HO) ₂ (S
i ₂ O ₃ R ₂ ) _n H ₂ and having 2 to 50 of the side chain R of the chemical formula
By applying a silicone ladder polymer film having a ladder structure in which mol% is an alkenyl group, which is a monovalent unsaturated atomic group having one carbon double bond in the molecular chain, and the other is a lower alkyl group, on the wiring layer The step of forming the silicone ladder polymer film, the step of drying the silicone ladder polymer film, the step of irradiating a predetermined region of the silicone ladder polymer film with ultraviolet light, the step of developing the silicone ladder polymer film, and the silicone ladder polymer film. And a step of forming an interlayer film by heat curing.

[0010]

The interlayer film having a predetermined pattern shape is formed without using a photoresist that does not remain in the structure.
Also, an interlayer film in which the lower step is flattened is formed by one-time coating.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. Example 1. 1A to 1D are process sectional views showing a method for manufacturing a semiconductor device according to an embodiment of the present invention. In the figure,
Reference numeral 1 is a substrate made of a semiconductor, 2 is a silicon oxide film formed on the substrate 1 by a CVD method, and 3 is a first wiring layer formed on the silicon oxide film 2. Here, active elements such as transistors to be connected to the first wiring layer 3 are omitted and not shown.

The manufacturing method will be described below with reference to the drawings.
First, AlS is formed on the substrate 1 on which the silicon oxide film 2 is formed.
An i alloy is deposited by sputtering, and as shown in FIG. 1A, this is patterned by photolithography to form a first wiring layer 3. Next, an anisole solution of polymethylvinylsilsesquioxane represented by the following chemical formula 1 having a weight average molecular weight of about 60,000 (20 wt%
Is adjusted to a concentration of 1) on the substrate 1. As a result, a polymethylvinylsilsesquioxane film having a film thickness of about 0.5 μm is formed on the first wiring layer 3 at 80 ° C.
And the solvent is dried for 30 minutes at 125 ° C. for 30 minutes to dry the solvent, and as shown in FIG.
Was formed.

[0013]

[Chemical 1] In the formula, n is a natural number.

The polymethylvinylsilsesquioxane film is excellent in flatness, and the step of the base can be almost flattened by one application. The silicone ladder polymer having a vinyl group which is a monovalent unsaturated atomic group having a hydroxyl group at the terminal and a side chain having one carbon double bond and a methyl group which is a lower alkyl shown in Chemical formula 1 is JP-A-3-207719
It was prepared according to the method disclosed in the publication.

Briefly, 0.25 mol (37.4 g and 40.4 g, respectively) of methyltrichlorosilane and vinyltrichlorosilane, which have been distilled and purified under a reduced pressure nitrogen stream, are added to methyl isobutyl ketone and the like. It dissolves in the organic solvent. Then, 1 mol (81.1 g) of ultrapure water adjusted to 10 ° C. is gradually added dropwise to the mixture over 1 to 3 hours to synthesize a prepolymer. Then, the prepolymer is made to have a high molecular weight by a dehydration condensation reaction to obtain polymethylvinylsilsesquioxane having a weight average molecular weight of about 60,000. This polymethylvinylsilsesquioxane contains sodium, potassium, iron,
The content of each of copper and lead is 1 ppm or less and the content of each of uranium and thorium is 1 ppb or less, which satisfies the required characteristics as a material used for LSI and the like.

Next, holes are formed at predetermined positions of the formed resin film 5. This is performed by photolithography using a photomask formed with a pattern that shields the position / region where a hole is to be formed. After exposing the resin film 5 with ultraviolet rays through this photomask, the resin film 5 in the non-exposed portion is removed by developing with anisole as a developing solution.
The interlayer film 5a having the contact holes 6 formed therein is heated and cured at 350 ° C. for 60 minutes as shown in FIG. 1 (c).
To form. In this way, since the resin film 5 itself has photosensitivity, it is not necessary to use another photoresist for forming the contact hole 6. Then, Al on this
A Si alloy is sputtered to form a second wiring layer 8 connected to the first wiring layer 3 via a contact hole 6, as shown in FIG.

Example 2. In the first embodiment, the interlayer flattening insulating film has a single-layer structure of only the silicone ladder polymer film shown in Chemical formula 1, but in the second embodiment, a two-layer structure of a silicon oxide film is used. FIG. 2 is a sectional view showing a method of manufacturing a semiconductor device according to a second embodiment of the present invention. The manufacturing method of the second embodiment will be described below with reference to the drawings. First, similarly to the first embodiment, as shown in FIG. 2A, the layers up to the first wiring layer 3 are formed. Then, a silicon oxide film 4 is deposited and formed thereon by a CVD method as shown in FIG.

Then, a resin film 5 made of polymethylvinylsilsesquioxane is formed on the silicon oxide film 4 in the same manner as in Example 1, and as shown in FIG. 2 (d).
An interlayer film 5a having a hole at a predetermined position is formed by photolithography. Then, the silicon oxide film 4 is etched using the interlayer film 5a as a mask to form a contact hole 6 in which a part of the first wiring layer 3 is exposed, as shown in FIG. 2 (e). Then, an AlSi alloy is deposited and formed on this by sputtering to form a second wiring layer 8 connected to the first wiring layer 3 through the contact hole 6, as shown in FIG.

Example 3. Although the silicon oxide film is formed under the layer made of polymethylvinylsilsesquioxane in the above-mentioned embodiment, the present invention is not limited to this, and the silicon oxide film is formed on the interlayer film made of polymethylvinylsilsesquioxane. Alternatively, a three-layer structure may be formed by forming a silicon oxide film. FIG. 3 is a sectional view showing a method for manufacturing a semiconductor device according to a third embodiment of the present invention.

The manufacturing method of the third embodiment will be described below with reference to the drawings. First, as in the first embodiment, as shown in FIG.
As shown in (a), the layers up to the first wiring layer 3 are formed.
Then, a silicon oxide film 4 is deposited and formed thereon by a CVD method as shown in FIG. 3B.
As shown in (c), a resin film 5 made of polymethylvinylsilsesquioxane is formed on the silicon oxide film 4 in the same manner as in Example 1. Then, a hole is formed in the resin film 5 at a predetermined position by photolithography to form an interlayer film 5a, and the silicon oxide film 4 is etched by using this as a mask to form the first wiring as shown in FIG. 3 (d). A contact hole 6 is formed in which part of the layer 3 is exposed.

Next, as shown in FIG. 3E, a silicon oxide film 7 is formed by the CVD method. Then, a hole is opened in the contact hole 6 of the silicon oxide film 7,
An AlSi alloy is deposited thereon by sputtering to form a second wiring layer 8 connected to the first wiring layer 3 via a contact hole 6 as shown in FIG. 3 (f). Here, for forming holes in the silicon oxide film 7, a photoresist is applied on the silicon oxide film 7 and dried, and then UV exposure is performed using a photomask in which a predetermined region (contact hole portion) is shielded from light. This is performed by developing this to form a resist pattern, etching the silicon oxide film 7 using this resist pattern as a mask, and finally removing the resist pattern.

In the first embodiment described above, the one-layer structure of the resin film made of polymethylvinylsilsesquioxane is described as the interlayer film. However, as in the second and third embodiments, the silicon oxide film is formed under the resin film. Or by sandwiching the resin film with a silicon oxide film, degassing from the resin film can be completely prevented, and a more reliable interlayer film can be formed. Conventionally, even if a two-layer or three-layer structure is used, it is necessary to apply SOG several times or to form a pattern,
Although it was necessary to use a photoresist that would be stripped later, this is not necessary in the second and third embodiments of the present invention. Although the resin layer 5 is formed by spin coating (spin coating) in the above embodiment, the present invention is not limited to this, and any coating method such as spray coating may be used as long as the resin film is uniformly formed. .

Example 4. By the way, although polymethylvinylsilsesquioxane was used as the silicone ladder polymer in the above examples, the present invention is not limited to this, and polymethylallylsilsesquioxane shown in Chemical formula 2 below may be used. This polymethylallylsilsesquioxane is prepared in the same manner as polymethylvinylsilsesquioxane. That is, allyltrichlorosilane may be used in place of vinyltrichlorosilane in the production of the polymethylvinylsilsesquioxane described above.

[0024]

[Chemical 2] In the formula, n is a natural number.

This polymethylallylsilsesquioxane is a butanol solution (adjusted to a concentration of 20% by weight).
Used in the state of. The formation of the interlayer film was the same as in Example 1, except that a butanol solution of polymethylallylsilsesquioxane was spin-coated, and the mixture was heated at 80 ° C. for 30 minutes, followed by 12
Heat treatment is performed at 5 ° C. for 30 minutes to dry the solvent, and holes are formed at predetermined positions by photolithography. In addition, butanol is used as a developing solution in photolithography, and after development, it is completely cured by treatment at 350 ° C. for 60 minutes. Also, in the fourth embodiment, the same effect as that of the first embodiment can be obtained.

Example 5. Polymethylvinylsilsesquioxane was used in Examples 1, 2, and 3, but in Example 5, a mixed solution of polymethyl γ-methacryloxypropylsilsesquioxane with butanol and butyl acetate (adjusted to 18% by weight) was used. Used). This polymethyl γ-
The methacryloxypropylsilsesquioxane synthesis method is performed by using γ-methacryloxypropyltrimethoxysilane instead of vinyltrichlorosilane in the synthesis of polymethylvinylsilsesquioxane described in Example 1. In this polymethyl γ-methacryloxypropyl silsesquioxane, “γ-methacryloxypropyl” is a monovalent unsaturated atomic group having one carbon double bond in the molecular chain and exhibits photosensitivity.

The formation of the interlayer film is the same as in Example 1, and a mixed solution of polymethyl γ-methacryloxypropyl silsesquioxane of butanol and butyl acetate is spin-coated, and the mixture is heated at 80 ° C. for 30 minutes, followed by The heat treatment is performed at 125 ° C. for 30 minutes to dry the solvent, and holes are formed at predetermined positions by photolithography. A mixed solution of butanol and butyl acetate was used as a developing solution in photolithography, and after development, the temperature was 60 ° C. at 350 ° C.
Complete cure by treatment for minutes. In addition, this fifth embodiment also has the same effect as that of the first embodiment.

The silicone ladder polymer having photosensitivity and high heat resistance is not limited to those shown in the above-mentioned examples, but it has a hydroxyl group at the terminal and a lower alkyl group and an alkenyl group at the side chain. Anything will do. By the way, although the case where aluminum is used as the material of the second wiring layer has been shown in the above-described embodiments, molybdenum, titanium,
Other metals such as iridium, vanadium, chromium and osmium may be used. The second wiring layer may be an alloy or a metal silicide. In this specification, the term "metal" refers to the case including the above cases. Further, although the present invention shows the case where the number of wiring layers is two, it goes without saying that the present invention can be applied to three or more layers.

[0029]

As described above, the semiconductor device of the present invention has the following chemical structure as an interlayer insulating film between the first wiring layer and the second wiring layer.
Since it uses a silicone polymer film that has photosensitivity and heat resistance as shown in Fig. 1, other photoresist is not required for patterning the insulating layer between wiring layers,
This has the effect of simplifying the process. The conventionally used silicon oxide film has no photosensitivity, a photoresist is required for patterning, and SOG or the like must be applied in an overlapping manner to flatten the base. Will increase and process cost will increase. Since SOG has poor heat resistance, the reliability of the device will be poor if it is used. However, the silicone ladder polymer film of the present invention has excellent flatness, and
Since it is not necessary to use the above together, a highly reliable semiconductor device whose cost is suppressed can be obtained, and there is almost no outgassing, and the reliability of the wiring layer is dramatically improved.

Further, the content of each of sodium, potassium, iron, copper, and lead is 1 ppm or less, and the content of each of uranium and thorium is 1 ppb or less, which is an obstacle to the characteristics of the LSI to be manufactured and manufacturing. It satisfies the required characteristics as a material used for LSI etc. Further, by forming an oxide film by the CVD method in the lower layer or the upper and lower layers of the resin film, even if the resin film is degassed, this can be prevented, so that the reliability of the wiring can be further improved. When the interlayer film is formed by coating, the base can be almost flattened by a single coating, so that the CVD
Even when it is used together with the oxide film by the method, the number of steps is smaller than that when SOG is used.

[Brief description of drawings]

FIG. 1 is a process sectional view showing a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing the method of manufacturing a semiconductor device which is the second embodiment of the present invention.

FIG. 3 is a cross-sectional view showing the method of manufacturing a semiconductor device which is the third embodiment of the present invention.

FIG. 4 is a cross-sectional view showing the formation of an interlayer film between wiring layers of a conventional semiconductor device in the order of steps.

[Explanation of symbols]

 1 Substrate 2 Silicon Oxide Film 3 First Wiring Layer 5 Resin Film 5a Interlayer Film 6 Contact Hole 8 Second Wiring Layer

Continuation of the front page (51) Int.Cl. ⁶ Identification number Office reference number FI Technical indication location 8826-4M H01L 21/90 P (72) Inventor Shigeyuki Yamamoto 8-1-1 Tsukaguchihonmachi, Amagasaki City, Hyogo Prefecture Ryoden Co., Ltd. Production Technology Laboratory (72) Inventor Hiroshi Adachi 8-1-1 Tsukaguchi Honcho, Amagasaki City, Hyogo Prefecture Sanryo Electric Co., Ltd. Production Technology Laboratory (72) Inventor Shigeru Harada 4 Mizuhara, Itami City, Hyogo Prefecture 1-chome Mitsubishi Electric Co., Ltd. Kita-Itami Works (72) Inventor Junko Matsubara 4-1-1 Mizuhara, Itami-shi, Hyogo Mitsubishi Electric Co., Ltd. Kita-Itami Works

Claims (7)

[Claims] 1. A chemical formula (HO) ₂ (Si ₂ O ₃ R ₂ ) _n H ₂ formed on a wiring layer, wherein the side chain R of the chemical formula is a lower alkyl group and carbon 2 in the molecular chain. There is an interlayer film composed of a silicone ladder polymer having a ladder structure composed of an alkenyl group which is a monovalent unsaturated atomic group having one heavy bond, and the alkenyl group occupies 2 to 50 mol% of side chains R. A semiconductor device characterized by the above. 2. The semiconductor device according to claim 1, wherein the content of sodium, potassium, iron, copper, and lead in the silicone ladder polymer is 1 pp.
A semiconductor device characterized in that the content of uranium and thorium is 1 ppb or less. 3. The semiconductor device according to claim 1, further comprising an oxide film formed by a CVD method under the interlayer film. 4. The semiconductor device according to claim 3, wherein an oxide film formed by a CVD method is provided on the interlayer film. 5. The step of forming a wiring layer, and the chemical formula is represented by (HO) ₂ (Si ₂ O ₃ R ₂ ) _n H ₂ , and ₂ to 50 mol% of the side chain R in the chemical formula is in the molecular chain. Carbon 2
Forming a film of a silicone ladder polymer having a ladder structure in which an alkenyl group is a monovalent unsaturated atomic group having one heavy bond and the other is a lower alkyl group on the wiring layer by coating; A step of drying the film of the ladder polymer, a step of irradiating a predetermined region of the film of the silicone ladder polymer with ultraviolet rays, a step of developing the film of the silicone ladder polymer, and a heat curing of the silicone ladder polymer film. And a step of forming an interlayer film. 6. The method for manufacturing a semiconductor device according to claim 5, wherein an oxide film is deposited and formed on the wiring layer by a CVD method before the film of the silicone ladder polymer is formed by coating. Manufacturing method of semiconductor device. 7. The method of manufacturing a semiconductor device according to claim 6, wherein an oxide film is deposited and formed on the interlayer film by a CVD method.