JPS6047419A - Multilayer level patterning method - Google Patents

Multilayer level patterning method

Info

Publication number
JPS6047419A
JPS6047419A JP58154137A JP15413783A JPS6047419A JP S6047419 A JPS6047419 A JP S6047419A JP 58154137 A JP58154137 A JP 58154137A JP 15413783 A JP15413783 A JP 15413783A JP S6047419 A JPS6047419 A JP S6047419A
Authority
JP
Japan
Prior art keywords
film
resist
pattern
mask
renost
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58154137A
Other languages
Japanese (ja)
Inventor
Ken Ogura
謙 小椋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP58154137A priority Critical patent/JPS6047419A/en
Publication of JPS6047419A publication Critical patent/JPS6047419A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004Photosensitive materials
    • G03F7/09Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
    • G03F7/094Multilayer resist systems, e.g. planarising layers

Abstract

PURPOSE:To obtain the excellent double layer pattern by a method wherein when the first and second resist films are laminated on a semiconductor substrate and the second film is subjected to exposure and development to be made into the predetermined pattern which is used as a mask for patterning the first film by O2 plasma, the novolak-group resin silylated including Si is used for the second film and this is irradiated with ultraviolet rays. CONSTITUTION:On the semiconductor substrate 11 having a level difference, the first resist film 12 is spreaded so as to fill up said difference and to level the surface and then the film is heated at 150-200 deg.C for about 30min to be insolubilized to an alcoholic solvent. Next, the second resist film 13 including an Si- including silylating agent, N-phenylaminopropyltrimethoxysilazane is spreaded on the film 12 and is heated again at 80 deg.C for 10-30min. After that, the substrate is irradiated with the ultraviolet ray 14 through a mask 15 having the predetermined opening and is immersed in an alcoholic solution to make the film 13 into the predetermined pattern 16. Next, the exposed part of the film 12 is removed with using the pattern 16 as a mask to form the predetermined pattern 18 and the desired double-layer pattern can be obtained.

Description

【発明の詳細な説明】 〔技術分野〕 本発明は微細i4ターン形形成用精精レジストパ、ター
ンユング法である多層レジストパターンユング法に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a precision resist pattern for forming a fine I4 turn shape and a multilayer resist pattern Jung method, which is a turn Jung method.

〔従来技術〕[Prior art]

従来のレジスト膜やターンユング法としては単一層レノ
ストに紫外線(UV)、遠紫外線(DUV)、電子線(
EB )、X線などにょ如露光した後現像液により現像
し、レノストパターンを得ていた。しかし、集積回路製
造ゾロセスにおいて、半導体基板は在住にして凸凹した
段差を有しておシ、これら段差基板にレジストを塗布し
た場合には凸凹部分にレノスト厚さのムシが生じると共
に段差部には往々にして利質の異なる材料が用いられる
ため、前記UV、EBの露光エネルギーが下地基板から
反射し、レノスト層中に不必要な露光部分が生じてレノ
ストノ4ターンを劣化させる。
Conventional resist film and turn-jung methods use ultraviolet (UV), deep ultraviolet (DUV), and electron beam (
After exposure to light such as X-rays, the film was developed with a developer to obtain a Lennost pattern. However, in integrated circuit manufacturing, semiconductor substrates have uneven steps, and when resist is applied to these step substrates, molds of Lennost's thickness appear on the uneven portions, and the steps are Since materials with different properties are often used, the UV and EB exposure energy is reflected from the underlying substrate, creating unnecessary exposed areas in the renost layer and deteriorating the renost layer.

これを改良するために多層レベル・やターンユング法が
考案された。最近の多層レベル・ぐターンユング法では
レジスト中にStを含有したレノストを上層レジスト膜
として用い、これを露光、現像した後上層レジスト・モ
ターンをマスクとして下層レノストを02プラズマにて
エツチングする方法が検討されている。(例えば半導体
集積回路技術第23回シンポノウムP18)。Stを含
有するレノストハ02ゾラズマに対して耐性を有するこ
とは発明者等により1.981年10月に俗物学会にて
発表されている。従ってSiを含有するレノストは原理
的には2層構造レノストとして応用されることは容易に
考えられる。
In order to improve this, the multi-level and turn-Jung method was devised. In the recent multilayer level Guternjung method, a renost containing St in the resist is used as the upper resist film, and after this is exposed and developed, the lower renost layer is etched with 02 plasma using the upper resist pattern as a mask. It is being considered. (For example, the 23rd Symponium on Semiconductor Integrated Circuit Technology P18). The inventors announced in October 1981 at the Society of Vultures that Renosto containing St is resistant to Zolazma 02. Therefore, it is easy to think that Si-containing renost can in principle be applied as a two-layer structure renost.

ここで、前記S1を含有するレノストを用いた方法は2
層レジスト・♀ターンユング法として工程が簡略である
利点を有しており有望なものと考えられるが、前記S1
を含有するレノストはビニルベンゼン系のため感光波長
が限られている。即ちレジストの露光エネルギー照射線
はFB、!:I)UVに限定されており、現在最も多く
用いられる放射エネルギービームであるUVが使え万い
欠点がある。このことは、即ち実用性に乏しいのは言う
までもない。
Here, the method using lenost containing S1 is 2
It is considered to be a promising method as it has the advantage of a simple process as a layered resist/♀turn-jung method, but the above-mentioned S1
Renost, which contains , is vinylbenzene-based and has a limited photosensitive wavelength. That is, the exposure energy irradiation ray of the resist is FB,! :I) It is limited to UV light, and has the drawback that UV light, which is currently the most commonly used radiant energy beam, cannot be used. Needless to say, this is impractical.

〔発明の目的〕[Purpose of the invention]

本発明の目的は露光エネルギー照射線としてUVを用い
る多層レベル・ぐターンユング法を提供することにある
It is an object of the present invention to provide a multilayer level Guternjung method using UV as the exposure energy radiation.

〔発明の構成〕[Structure of the invention]

本発明は半導体基板上にノゼラック系樹脂を第1のl/
シストとして塗布、加熱し、さらにSiを含有し、シリ
ル化したノぎラック系樹脂を第2のレジストとして塗布
、加熱後、前記第2のレジストを特定の・ぐターンにU
Vで露光し、現像、加熱または加熱、現像してできたレ
ジス)パターンを前記第1のレジストのマスクツ9ター
ンとして前記第1のレジストを02プラズマにてエツチ
ングしてめるレジスト、pターンを得るものである。
In the present invention, a Nozerac resin is applied on a semiconductor substrate in a first l/l/
After coating and heating as a cyst, further coating a silylated Nogilac resin containing Si as a second resist, and heating, the second resist is applied in a specific pattern.
A resist (p-turn) is obtained by etching the first resist with 02 plasma, using a resist (resist) pattern formed by exposing with V, developing, heating or heating and developing as a mask of the first resist with 9 turns. It's something you get.

〔実施例〕〔Example〕

第1図は本発明の前提となるシリコン含有のシリル化剤
を添加したノがラック系樹脂のレジストの02プラズマ
耐性を紫外線感光レジストとして著名なツメラック系レ
ノストMP1400−27レノスI・(シッゾレー社商
品名)20CHにシリコン含有ノリル他剤N−フェニル
アミノゾロぎルトリメトキノシラザンを1〜7cc混合
したレノストの02ゾラズマ耐性(残膜厚率)をMP 
1400−27レノスト100%のものと比較したもの
である。なお、膜厚は15μmである。第1図によシ前
記シリル化剤を混合したレジストは前記シリル化剤の添
加量の増大につれて02ゾラズマ耐性が向上し、添加量
5 CCまではこの傾向を示すが、5CC以後7CCに
なるとやや酸素プラズマ耐性が低下する。しかしこの場
合でもほぼ8割が残っており、十分な耐性を示している
Figure 1 shows the 02 plasma resistance of a resin resist made of a resin containing silicone, which is the premise of the present invention, and the resistance to plasma of the resin. MP) 02 Zolazma resistance (residual film thickness rate) of Rennost, which is a mixture of 1 to 7 cc of silicon-containing Noryl and other agents N-phenylaminozologyltrimethoquinosilazane to 20CH
This is a comparison with 100% 1400-27 Renost. Note that the film thickness is 15 μm. As shown in FIG. 1, the resistance to 02 Zolazma of the resist mixed with the silylating agent improves as the amount of the silylating agent increases, and this tendency is shown up to 5 CC, but after 5 CC and 7 CC, the resistance to 02 Zolazma improves. Oxygen plasma resistance decreases. However, even in this case, almost 80% remained, indicating sufficient resistance.

一方、前記シリル化剤を添加していないMP1400−
27 レジスト100%のものは0270ラズマ放置時
間に対して比例的にエツチングされ、厚さ1.4μmの
レジストがおよそ13分で除去されることを示している
。以上のととよシ、前記シリル化剤を混合したMP 1
400−27レジストは02プラズマに対して耐性を示
すだめ、これを02プラズマに対するマスクとして適用
することによシ下層レジストをエツチングすることが可
能であることが判る0 第2図は本発明の第1の実施例を示す半導体基板の断面
図である。まず、段差を有する半導体基板11上にMP
1400−27レソスト12を厚さ2μmに塗布する。
On the other hand, MP1400- without the addition of the silylating agent
27 The 100% resist was etched proportionally to the 0270 plasma exposure time, indicating that a 1.4 μm thick resist was removed in approximately 13 minutes. MP 1 mixed with the above silylating agent
Since the 400-27 resist exhibits resistance to the 02 plasma, it can be seen that by applying it as a mask for the 02 plasma, it is possible to etch the underlying resist. 1 is a cross-sectional view of a semiconductor substrate showing a first embodiment; FIG. First, an MP is placed on a semiconductor substrate 11 having a step.
1400-27 Resost 12 is applied to a thickness of 2 μm.

(第2図(A))次に半導体基板を150〜200℃3
0分加熱し、アルコール系溶剤に不溶とする。その後前
記半導体基板上にシリコン含有のシリル化剤N−フェニ
ルアミノグロビルトリメトキシンラザンを含有したMP
 1400−27レジストI:9を厚さ1.4μmに塗
布し再び80℃で10〜30分間加熱する(第2図(B
))その後前記半導体基板をU V I Jによりノぞ
ターンマスク15を介して露光する。(第2図(C))
その後アルコール系溶剤の現像液によシ浸漬あるいはス
ダレ−法により現像し、レジスト/、oターン16を得
る。(第2図の))前記レジス)パターン16は下層半
導体基板からの反射等の影響は極めて少なく、高精度パ
ターンが得られる。なお、前記MP 1400−27レ
ノストは前記シリル化剤の添加による解像度の劣化は認
められない利点を有していることが確認された。さて、
現像終了後耐02プラズマ性を向上させるため100℃
〜180℃の温度で、本実施例においては150℃で1
0分間再びベークする。そして平行平板型02グラズマ
装置によシ前記上層レノストをマスクとして下層レジス
トを02ノラズマ1′7にて゛エノチングする。その結
果極めてシャーシなグロファイルを有するレノスト・ぐ
ターフ18−J:得られた。
(Fig. 2 (A)) Next, the semiconductor substrate was heated to 150 to 200°C.
Heat for 0 minutes to make it insoluble in alcohol solvents. Thereafter, an MP containing a silicon-containing silylating agent N-phenylaminoglobil trimethoxine lazan was applied on the semiconductor substrate.
1400-27 resist I:9 was applied to a thickness of 1.4 μm and heated again at 80°C for 10 to 30 minutes (see Figure 2 (B).
)) Thereafter, the semiconductor substrate is exposed to UVIJ through the nozzle turn mask 15. (Figure 2 (C))
Thereafter, it is developed by immersion in an alcoholic solvent developer or by the sdale method to obtain a resist/o-turn 16. The resist pattern 16 (in FIG. 2) is extremely less affected by reflections from the underlying semiconductor substrate, and a highly accurate pattern can be obtained. It has been confirmed that the MP 1400-27 Renost has the advantage that no deterioration in resolution is observed due to the addition of the silylation agent. Now,
100℃ to improve 02 plasma resistance after development.
1 at a temperature of ~180°C, in this example at 150°C.
Bake again for 0 minutes. Then, using a parallel plate type 02 grama device and using the upper layer resist as a mask, the lower resist layer is etched with 02 lazer 1'7. As a result, Renost Guturf 18-J was obtained, which had an extremely chassis-like profile.

(第2図(匂) 第1の実施例では上層レノストのパターニングにおいて
露光現像後に加熱工程を伺与したが、第2の実施例では
露光後すぐに加熱した後、現像しパターンを得た。その
他の工程は第1の実施例と同一工程を経て行なった結果
、第1の実施例と同様なシャーシなグロファイルを有す
る・やターンを得た。
(Figure 2 (odor)) In the first example, a heating step was performed after exposure and development in patterning the upper layer lenost, but in the second example, a pattern was obtained by heating immediately after exposure and then developing. The other steps were the same as in the first example, and as a result, a slight turn with the same chassis profile as in the first example was obtained.

第1および第2の実施例ではシリル化剤としてN〜フェ
ニルアミノゾロピルトリメトキシシラザンを用いたが第
3の実施例ではシリル化剤として1寸−トリメチルシリ
ルアニリンを用いた他は第1と第2の実施例と同一行程
を経て行なった所、第1、第2の実施例と同様の結果が
得られた。
In the first and second examples, N~phenylaminozolopyltrimethoxysilazane was used as the silylating agent, but in the third example, 1-trimethylsilylaniline was used as the silylating agent. When the same process as in the second embodiment was carried out, the same results as in the first and second embodiments were obtained.

また、第1.第2.第3の実施例では主しソスト剤とし
てMP 1400−27レノストを用いたが、第4の実
施例では0FPR800(東京応化商品名)レノストを
用い、その他は第1.第2.第3の実施例と同一行程を
経て行なった結果、前記と同様の結果が得られた。
Also, 1st. Second. In the third example, MP 1400-27 Renost was mainly used as the sost agent, while in the fourth example, 0FPR800 (trade name of Tokyo Ohka Chemical Co., Ltd.) was used, and the others were as follows. Second. As a result of carrying out the same process as in the third example, the same results as above were obtained.

〔発明の効果〕〔Effect of the invention〕

本発明は紫外線に感光するノビラック系樹脂のレジスト
に81を含有したシリル化剤を混合することにより、耐
02プラズマ性の優れた紫外線感光レノストを得て、露
光エネルギー照射線としてUVを用いる簡便にして優れ
た2層レジスト・ぐターニング法が得たもので、これは
高密度集積回路に利用することができる。
In the present invention, by mixing a silylation agent containing 81 with a UV-sensitive novilac resin resist, an ultraviolet-sensitive renost with excellent 02 plasma resistance is obtained, and it is easy to use UV as the exposure energy irradiation. This results in an excellent two-layer resist patterning method that can be used in high-density integrated circuits.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はシリコン含有シリル他剤添加のMP1’400
−27レジストの耐02プラズマ性を示す説明図、第2
図は本発明を実施した半導体基板の断面図である。 11・・・半導体基板、12・・下層レノスト、13・
・・上層レジスト、14・・・紫外ff1J、15・・
・パターンマスク、16・・・上層レノストパターン、
17・・・o2プラズマ、18・・・下層レノスト・ぐ
ターン。 第1図 第2図
Figure 1 shows MP1'400 with silicon-containing silyl and other agents added.
Explanatory diagram showing the 02 plasma resistance of -27 resist, Part 2
The figure is a cross-sectional view of a semiconductor substrate implementing the present invention. 11. Semiconductor substrate, 12. Lower layer renost, 13.
... Upper layer resist, 14... Ultraviolet ff1J, 15...
・Pattern mask, 16... Upper layer Renost pattern,
17...o2 plasma, 18...lower Renost Gutan. Figure 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims] 半導体基板上に第1のレジスト、第2のレジストを順次
重ねて塗布し、前記第2のレノストを露光、現像してで
きた特定のレノスト・ヤターンを前記第1のレノストの
マスクとして02fラズマでエツチングしてめるレジス
ト膜やターンを得る多層レベル・ぐターンユング法にお
いて、前記第2のレジストとしてSiを含有し、シリル
化したノがラック系樹脂を塗布する工程と、前記第2の
レジストを紫外線で露光する工程を含むことを特徴とし
た多層レペルノクターンニング法。
A first resist and a second resist are sequentially coated on a semiconductor substrate, and a specific renost Yaturn obtained by exposing and developing the second renost is used as a mask for the first renost using an 02f plasma. In the multilayer level patterning method for obtaining a resist film or a turn by etching, a step of applying a silylated resin containing Si as the second resist; A multilayer Lepernoc turning method characterized by including a step of exposing the material to ultraviolet light.
JP58154137A 1983-08-25 1983-08-25 Multilayer level patterning method Pending JPS6047419A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58154137A JPS6047419A (en) 1983-08-25 1983-08-25 Multilayer level patterning method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58154137A JPS6047419A (en) 1983-08-25 1983-08-25 Multilayer level patterning method

Publications (1)

Publication Number Publication Date
JPS6047419A true JPS6047419A (en) 1985-03-14

Family

ID=15577694

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58154137A Pending JPS6047419A (en) 1983-08-25 1983-08-25 Multilayer level patterning method

Country Status (1)

Country Link
JP (1) JPS6047419A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0274757A2 (en) * 1987-01-12 1988-07-20 EASTMAN KODAK COMPANY (a New Jersey corporation) Bilayer lithographic process
JPH0258220A (en) * 1988-08-23 1990-02-27 Fujitsu Ltd Manufacture of semiconductor device
WO2005010972A1 (en) * 2003-07-23 2005-02-03 Fsi International, Inc. Improvements in the use of silyating agents

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0274757A2 (en) * 1987-01-12 1988-07-20 EASTMAN KODAK COMPANY (a New Jersey corporation) Bilayer lithographic process
JPH0258220A (en) * 1988-08-23 1990-02-27 Fujitsu Ltd Manufacture of semiconductor device
WO2005010972A1 (en) * 2003-07-23 2005-02-03 Fsi International, Inc. Improvements in the use of silyating agents

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