JPS62281328A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain wiring patterns having fine configurations without deposition and without increase in capacitance, by dry etching a metallic thin film into desired patterns while specifying a proportion of a total area of patterns including a dummy pattern in the substrate, and thereafter removing the dummy pattern by etching the same. CONSTITUTION:Photoresist 6 provides a wiring pattern mask 6a corresponding to an intrinsic second aluminium wiring and having an extremely small width, while it also provides a mask 6b in a region where a dummy pattern having a required area is to be formed. The size of the dummy pattern mask 6b is determined such that the total area of the masks 6a and 6b is 40 % or more of the area of the silicon substrate 1. Subsequently, an aluminium film 5 is plasma etched and the photoresist 6 is removed to form the second aluminium wiring pattern 5a and the dummy pattern 5b. Since the dummy pattern 5b is removed finally, it does not provide any unnecessary capacitance with the first aluminium wiring 3.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing a semiconductor device including fine wiring.

[Conventional technology]

Generally, a thin aluminum film formed into a desired pattern is used for the wiring of a semiconductor device, and a so-called dry etching method such as a plasma etching method is used to form this pattern. However, in dry etching of this type of aluminum thin film, it is known that thinning of the wiring occurs if the pattern occupation area ratio of the aluminum wiring ((area where pattern exists/pellet area) x 100) is less than 40%. ing. This thinning of the wiring is particularly noticeable when the underlying layer is a silicon nitride film.

For this reason, conventional methods for preventing thinning of the wiring include methods in which etching is performed under low pressure and low 2tiffi conditions;
Alternatively, a method has been proposed in which a dummy pattern is inserted in order to increase the pattern occupation area ratio under the same etching conditions, or a method in which the wiring itself is made thicker.

[Problem that the invention seeks to solve]

In the conventional method described above, the method of changing the first etching condition is effective in preventing wiring thinning, but depending on the etching conditions, deposition may easily occur, contaminating the semiconductor device being manufactured, etc. There is a problem of lowering reliability.

Furthermore, if this method of inserting the second dummy pattern is applied to the formation of the upper layer wiring, extra capacitance will be generated between the dummy pattern and the lower layer wiring, resulting in semiconductor devices that require high-speed operation. This will lead to deterioration of characteristics.

Furthermore, the method of increasing the thickness of the third wiring itself has a problem in that it is inappropriate for semiconductor devices having fine wiring structures.

[Means for solving problems]

The method for manufacturing a semiconductor device of the present invention makes it possible to form interconnects that can be miniaturized without causing deposition or an increase in capacitance.

In the semiconductor device manufacturing method of the present invention, when dry etching a metal thin film into a desired pattern, the pattern occupation area ratio including the dummy pattern is 40% of the pellet area.
% or more, and then the dummy pattern is removed by etching.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIGS. 1(a) to 1(d) are sectional views showing an embodiment in which the present invention is applied to a two-layer wiring integrated circuit in the order of manufacturing steps, and FIG. 2 is a plan view of FIG. 1(b).

First, as shown in FIG. 1(a), a silicon oxide film 2. is formed on a silicon substrate 1 by a normal method. First aluminum wiring 3
After forming a silicon nitride film 4, an aluminum film 5 on which a second aluminum wiring will be formed is formed over the entire surface. Then, on this aluminum film 5, a photoresist 6 is formed in a desired pattern. In this case, the photoresist 6 forms a mask 6a of a wiring pattern with a fine width corresponding to the original second aluminum wiring, and also forms a mask 6a in a region where a dummy pattern of a required area is to be formed.
Form b. The dummy pattern mask 6
Set the size of b.

Next, plasma etching is performed on the aluminum film 5 using the photoresist 6 as a mask, and then the photoresist 6 is removed to form a second aluminum wiring pattern 5a and a dummy pattern 5b as shown in FIG. do.

Therefore, during this plasma etching, the second
Patterns 5a, 5 made of aluminum as shown in the figure
The total area of b has an occupied area ratio of 14+0% or more with respect to the pellet area. Therefore, even if etching is performed by the plasma etching method under normal conditions, the underlying silicon Although the nitride film 3 is used, thinning of the wiring does not occur, and a wiring with a good pattern can be obtained.

Next, as shown in FIG. 1(c), a photoresist 7 is selectively formed so as to cover only the originally necessary wiring pattern 5a, and plasma etching is performed again to form the dummy pattern 5b as shown in FIG. 1(d). Remove by etching. After that, by removing the photoresist 7, the second aluminum wiring 5 required by the wiring pattern 5a is removed.
a is formed.

In this case, since the dummy pattern 5b is finally removed, no unnecessary capacitance is formed between the dummy pattern 5b and the first aluminum wiring 3, and the high speed operation of the semiconductor device is not impaired.

Note that a wet etching method may be used to remove this dummy pattern 5b.

In addition, although the embodiment described above shows an example in which the present invention is applied to a two-layer wiring, the present invention is not limited to this, and can be similarly applied to a single-layer wiring structure, or a wiring structure of three or more layers. Furthermore,
If the same problem occurs when patterning thin films of metals other than aluminum, the present invention can be similarly applied.

〔Effect of the invention〕

As explained above, in the present invention, when dry etching a metal thin film into a desired pattern, the dry etching is performed in a state where the pattern occupation area ratio including the dummy pattern is 40% or more, and then the dummy pattern is etched. This prevents thinning of the metal thin film pattern wiring due to dry etching, making it possible to manufacture fine wiring structures, and allowing high-speed operation of semiconductor devices without creating unnecessary capacitance. There is no obstruction.

[Brief explanation of drawings]

1(a) to 1(d) are cross-sectional views showing the method of the present invention in the order of manufacturing steps, and FIG. 2 is a plan view of FIG. 1(b).

Claims (3)

[Claims] (1) When dry etching the metal thin film into the desired pattern, dry etching is performed in such a way that the pattern occupation area ratio including the dummy pattern is 40% or more of the pellet area, and then the dummy pattern is removed by etching. 1. A method of manufacturing a semiconductor device, the method comprising the step of: (2) The method for manufacturing a semiconductor device according to claim 1, wherein the metal thin film is an aluminum film. (3) The method of manufacturing a semiconductor device according to claim 2, wherein the metal thin film is formed using a silicon nitride film as a base.