JPS63262856A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS63262856A JPS63262856A JP9829787A JP9829787A JPS63262856A JP S63262856 A JPS63262856 A JP S63262856A JP 9829787 A JP9829787 A JP 9829787A JP 9829787 A JP9829787 A JP 9829787A JP S63262856 A JPS63262856 A JP S63262856A
- Authority
- JP
- Japan
- Prior art keywords
- film
- insulating film
- window
- wiring
- electrode window
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 11
- 238000004519 manufacturing process Methods 0.000 title claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 41
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 41
- 238000000034 method Methods 0.000 claims description 16
- 238000000151 deposition Methods 0.000 claims description 8
- 238000005530 etching Methods 0.000 claims description 8
- 238000000059 patterning Methods 0.000 claims description 3
- 239000011229 interlayer Substances 0.000 abstract description 18
- 239000000758 substrate Substances 0.000 abstract description 8
- 229910052581 Si3N4 Inorganic materials 0.000 abstract description 7
- 238000007872 degassing Methods 0.000 abstract description 3
- 238000010030 laminating Methods 0.000 abstract 1
- 230000003449 preventive effect Effects 0.000 abstract 1
- 238000007493 shaping process Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 27
- 239000007789 gas Substances 0.000 description 13
- 230000002265 prevention Effects 0.000 description 6
- 238000004544 sputter deposition Methods 0.000 description 5
- XPDWGBQVDMORPB-UHFFFAOYSA-N Fluoroform Chemical compound FC(F)F XPDWGBQVDMORPB-UHFFFAOYSA-N 0.000 description 4
- 238000001020 plasma etching Methods 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 3
- 239000012495 reaction gas Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 229910005091 Si3N Inorganic materials 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000035699 permeability Effects 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- VZGDMQKNWNREIO-UHFFFAOYSA-N tetrachloromethane Chemical compound ClC(Cl)(Cl)Cl VZGDMQKNWNREIO-UHFFFAOYSA-N 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- 238000001947 vapour-phase growth Methods 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- IOVCWXUNBOPUCH-UHFFFAOYSA-N Nitrous acid Chemical compound ON=O IOVCWXUNBOPUCH-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910007277 Si3 N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000000637 aluminium metallisation Methods 0.000 description 1
- 229910002090 carbon oxide Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000007429 general method Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 230000007935 neutral effect Effects 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- GQPLMRYTRLFLPF-UHFFFAOYSA-N nitrous oxide Inorganic materials [O-][N+]#N GQPLMRYTRLFLPF-UHFFFAOYSA-N 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- RMAQACBXLXPBSY-UHFFFAOYSA-N silicic acid Chemical compound O[Si](O)(O)O RMAQACBXLXPBSY-UHFFFAOYSA-N 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000009489 vacuum treatment Methods 0.000 description 1
- 239000012808 vapor phase Substances 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
【発明の詳細な説明】
[概要]
半導体基板上の絶縁膜に電極窓を形成した後、電極窓を
含む表面に絶縁膜含有ガスの透過を防止する第2の絶縁
膜を被着し、その第2の絶縁膜を垂直にエツチングして
、電極窓の側面にのみ第2の絶縁膜を残存させる。次い
で、アルミニウムを被着し配線を形成する。そうすると
、電極窓にコンタクト抵抗の小さいアルミニウム配線が
接続される。[Detailed Description of the Invention] [Summary] After forming an electrode window on an insulating film on a semiconductor substrate, a second insulating film that prevents permeation of a gas containing the insulating film is deposited on the surface including the electrode window, and then The second insulating film is etched vertically so that it remains only on the side surfaces of the electrode windows. Next, aluminum is deposited to form wiring. Then, the aluminum wiring with low contact resistance is connected to the electrode window.
[産業上の利用分野]
本発明は半導体装置の製造方法のうち、層間絶縁膜の形
成方法に関する。[Industrial Field of Application] The present invention relates to a method of forming an interlayer insulating film among methods of manufacturing a semiconductor device.
ICやLSIなどの半導体装置は高密度、筋集積化され
て、半導体基板上に多数の半導体素子が設けられ、それ
らを接続するための配線が2層13Nと多層に形成され
ている。Semiconductor devices such as ICs and LSIs are highly densely integrated, and a large number of semiconductor elements are provided on a semiconductor substrate, and wiring for connecting them is formed in multiple layers, including two layers 13N.
一方、これらの配線にはアルミニウム、多結晶シリコン
、金属シリサイド、高融点金属など種々の材料が用いら
れているが、当初からのアルミニウムが電気伝導性が良
くて、絶縁膜゛との接着性も良く、しかも、低コストで
入手できるために、依然として汎用されている。On the other hand, various materials are used for these wirings, such as aluminum, polycrystalline silicon, metal silicide, and high-melting point metals, but aluminum, which has been used since the beginning, has good electrical conductivity and good adhesion with insulating films. It is still widely used because it is good and available at low cost.
しかし、ICJPLSIの信頼性は配線の断線や短絡な
ど、配線の信頼性に大きく依存しており、配線や層間絶
縁膜の信頼性の高い形成方法が要望されている。However, the reliability of ICJP LSI largely depends on the reliability of the wiring, such as disconnection or short circuit of the wiring, and there is a need for a highly reliable method of forming wiring and interlayer insulating films.
[従来の技術]
第2図(a)〜(C)は従来の第一層目のアルミニウム
配線を形成し、その第一層目のアルミニウム配線上に層
間絶縁膜を形成し、更に、その上に第二層目のアルミニ
ウム配線を形成する形成方法の工程順断面図である。[Prior Art] FIGS. 2(a) to 2(C) show a conventional method in which a first layer of aluminum wiring is formed, an interlayer insulating film is formed on the first layer of aluminum wiring, and then an interlayer insulating film is formed on the first layer of aluminum wiring. FIG. 3 is a step-by-step sectional view of a forming method for forming a second layer of aluminum wiring.
第2図(a)参照;半導体基板1上の酸化シリコン(S
iO2)膜2を介して第一層目のアルミニウム配′fa
3を形成し、その上に層間絶縁膜を形成するが、その層
間絶縁膜4はヒロック防止膜41とスピンオングラス
(SOG)膜42と燐シリケートガラス(P S G)
膜43とを順次に積層した3層からなる絶縁膜である。See FIG. 2(a); silicon oxide (S) on the semiconductor substrate 1.
iO2) The first layer of aluminum metallization via the film 2
3 is formed, and an interlayer insulating film is formed thereon, and the interlayer insulating film 4 consists of a hillock prevention film 41 and a spin-on glass.
(SOG) film 42 and phosphorus silicate glass (PSG)
This is an insulating film consisting of three layers in which the film 43 and the film 43 are sequentially laminated.
一層目のヒロック防止膜41は、アルミニウムが熱処理
などによって突出した突起(ヒロック; hilloc
k)が生じるのを防止するための膜で、ヒロックができ
ると上下の配線が短絡する心配があるからである。この
ヒロック防止膜はスパッタ法で被着した5i02膜(膜
厚1500人程度ゴヤプラズマ気相成長法で被着した5
i02膜(膜ff2000人程度)でゴヤされ、硬度を
有する絶縁膜が用いられる。The first layer of the hillock prevention film 41 is made of protrusions (hillocks) that are formed by heat treatment of aluminum.
This is because the film is used to prevent the formation of k), and if hillocks form, there is a risk of short-circuiting between the upper and lower wiring. This hillock prevention film is a 5i02 film deposited by sputtering (film thickness approximately 1,500 mm).
An insulating film having hardness and hardness is used.
二層目のSOG膜42は水酸化シリコンを有機溶剤に混
合した公知の液状膜で、表面を平坦化させる利点があり
、これを塗布した後、窒素中で450゛Cに加熱し溶剤
を揮発させて5i02膜に変成するもので、その膜厚は
厚い部分で3000人、薄い部分で600人程ゴヤ積層
される。The second layer SOG film 42 is a well-known liquid film made by mixing silicon hydroxide with an organic solvent, and has the advantage of flattening the surface. After coating, it is heated to 450°C in nitrogen to volatilize the solvent. The film is then metamorphosed into a 5i02 film, which has a thickness of about 3,000 layers in the thick part and 600 layers in the thin part.
最上層の三層目のPSG膜43は層間絶縁膜の主膜であ
り、基板を400〜450℃程度に加熱して、減圧また
は常圧の気相成長法によって膜厚5000〜6000人
程度に被着するゴヤのPSG膜は水分を吸収し、アルミ
ニウムの酸化を防ぐ等の効果のある、所謂、パッシベー
ション膜である。The third PSG film 43, which is the uppermost layer, is the main interlayer insulating film, and is made to a thickness of about 5,000 to 6,000 by heating the substrate to about 400 to 450°C and using vapor phase growth under reduced pressure or normal pressure. Goya's PSG film is a so-called passivation film that absorbs moisture and prevents aluminum from oxidizing.
このように、三層からなる層間絶縁膜を形成しているが
、更に、窓開けの前処理として層間絶縁膜を被着後に中
性または還元性雰囲気中で450℃。In this way, an interlayer insulating film consisting of three layers is formed, and as a pretreatment for window opening, after the interlayer insulating film is deposited, the film is heated at 450° C. in a neutral or reducing atmosphere.
30分程度に加熱して脱ガスをおこなっている。Degassing is performed by heating for about 30 minutes.
第2図(b)参照;次いで、この層間絶縁膜4に電極窓
5を窓開けする。これは、第一層目のアルミニウム配線
3と層間絶縁膜4の上に形成する予定の第二層目のアル
ミニウム配線との接続孔で、その形成方法は、フォトレ
ジスト膜(図示せず)をマスクにして、電極窓形成領域
の眉間絶縁膜4を露出させて、その部分をドライエツチ
ングする。Refer to FIG. 2(b); next, an electrode window 5 is opened in this interlayer insulating film 4. This is a connection hole between the first layer of aluminum wiring 3 and the second layer of aluminum wiring to be formed on the interlayer insulating film 4, and its formation method is to use a photoresist film (not shown). Using a mask, the glabellar insulating film 4 in the electrode window forming area is exposed, and that portion is dry-etched.
ドライエツチング法は四塩化炭素(CF4)とトリフロ
ロメタン(CHFa)との混合ガスを反応ガスとしたプ
ラズマエツチングで、垂直にエツチングするりアクティ
ブイオンエッチ(RI E)である。The dry etching method is plasma etching using a mixed gas of carbon tetrachloride (CF4) and trifluoromethane (CHFa) as a reactive gas, and is vertical etching or active ion etching (RIE).
第2図(C)参照;次いで、その電極窓5を含む層間絶
縁膜4上にアルミニウム膜をスパッタ法で被着し・フォ
トプロセスでパターンニングして第二層目のアルミニウ
ム配線6を形成する。なお、アルミニウム膜を被着する
際には、基板を約260℃に加熱しておく。Refer to FIG. 2(C); Next, an aluminum film is deposited on the interlayer insulating film 4 including the electrode window 5 by a sputtering method and patterned by a photo process to form a second layer of aluminum wiring 6. . Note that when depositing the aluminum film, the substrate is heated to about 260°C.
以上が従来の層間絶縁膜を含む多層アルミニウム配線の
一般的な形成方法である。The above is a general method for forming a multilayer aluminum wiring including a conventional interlayer insulating film.
[発明が解決しようとする問題点コ
ところが、上記のように、アルミニウム膜をスパッタ法
で被着して、第二層目のアルミニウム配線6を形成する
と、電極窓5の中にアルミニウム膜が完全に堆積せずに
付着しないところができ、第2図(C)の矢印で示す空
隙個所が発生する。これは、第二層目のアルミニウム配
線6を被着する際、基板を約260℃に加熱し、10−
2〜10 Torrの高真空度にしてアルミニウム膜
をスパッタすると、低温成長した眉間絶縁膜に含まれる
ガスが高真空のために電極窓に脱出し、それがアルミニ
ウム膜の堆積を妨げているものと考えられる。[Problems to be Solved by the Invention] However, when the second layer of aluminum wiring 6 is formed by depositing an aluminum film by sputtering as described above, the aluminum film is not completely covered in the electrode window 5. There are areas where the particles are not deposited and do not adhere, and void areas are generated as shown by the arrows in FIG. 2(C). When depositing the second layer of aluminum wiring 6, the substrate is heated to about 260°C and 10-
When an aluminum film is sputtered under a high vacuum of 2 to 10 Torr, the gas contained in the glabella insulating film grown at low temperature escapes into the electrode window due to the high vacuum, and this is thought to be hindering the deposition of the aluminum film. Conceivable.
なお、上記したように、眉間絶縁膜の被着後に加熱して
一旦脱ガスをおこなっているが、その時は表面のみ加熱
溶融して内部に含まれる未反応物や未分解物が未だ残っ
たままとなり、それが溶融表面から脱ガスされにくくな
っており、これが高真空処理により電極窓内に抜は出し
て、アルミニウムの被着を妨害しているものと思われ、
特に、SOG膜42の側面への付着が良くない。As mentioned above, after the glabella insulating film is deposited, it is heated and degassed once, but at that time, only the surface is heated and melted, and unreacted and undecomposed substances contained inside still remain. This makes it difficult for this gas to be degassed from the molten surface, and it is thought that this is extracted into the electrode window by high vacuum treatment and is interfering with the adhesion of aluminum.
In particular, the adhesion to the side surfaces of the SOG film 42 is not good.
このような問題は、最近、ICが高集積化・高密度化さ
れて、電極窓が微細化され、例えば、2μm角以下と電
極窓が小さくなってきたためにコンタクト抵抗が顕しく
増加して問題視されてきたものである。Recently, as ICs have become more integrated and denser, electrode windows have become smaller, for example, smaller than 2 μm square, resulting in a significant increase in contact resistance. It has been viewed as such.
且つ、遠因はアルミニウム膜の融点が低くて、450℃
以上に加熱することが無理なことにあるが、電気伝導性
が良く、他のメリットも多いアルミニウム配線を使用す
るには、このような問題点を解消させることが重要であ
る。本発明はこの層間絶縁膜が原因となったアルミニウ
ム配線のコンタクト抵抗を減少させるための、層間絶縁
膜の形成方法を提案するものである。Moreover, the underlying cause is that the melting point of the aluminum film is low, at 450℃.
Although it is impossible to heat the aluminum wiring to a higher level, it is important to solve these problems in order to use aluminum wiring, which has good electrical conductivity and has many other benefits. The present invention proposes a method for forming an interlayer insulating film in order to reduce the contact resistance of aluminum wiring caused by this interlayer insulating film.
[問題点を解決するための手段]
その目的は、絶縁膜を窓開けして電極窓を形成した後、
該電極窓を含む表面に、前記絶縁膜が含有するガスの透
過を防止する第2の絶縁膜を被着する工程、次いで、該
第2の絶縁膜を垂直にエツチングして、前記電極窓の側
面にのみ該第2の絶縁膜を残す工程、次いで、該電極窓
を含む全面にアルミニウム膜を被着しパターンニングし
て、アルミニウム配線を形成する工程が含まれる半導体
装置の製造方法によって達成される。[Means for solving the problem] The purpose is to open a window in the insulating film to form an electrode window, and then
A step of depositing a second insulating film that prevents permeation of the gas contained in the insulating film on the surface including the electrode window, and then etching the second insulating film vertically to form the electrode window. This is achieved by a method for manufacturing a semiconductor device that includes the steps of leaving the second insulating film only on the side surfaces, and then depositing and patterning an aluminum film on the entire surface including the electrode window to form an aluminum wiring. Ru.
[作用]
即ち、本発明は、電極窓を形成した後、電極窓を含む表
面に絶縁膜含有ガスの透過を防止する第2の絶縁膜を被
着し、その第2の絶縁膜を垂直にエツチングして、電極
窓の側面にのみ残存させ、その上にアルミニウム配線を
形成する。そうすると、電極窓にコンタクト抵抗の小さ
いアルミニウム配線が形成される。[Function] That is, in the present invention, after forming the electrode window, a second insulating film that prevents the permeation of the gas containing the insulating film is deposited on the surface including the electrode window, and the second insulating film is vertically disposed. Etching is performed to leave only the side surfaces of the electrode windows, and aluminum wiring is formed thereon. Then, aluminum wiring with low contact resistance is formed in the electrode window.
[実施例] 以下、図面を参照して実施例によって詳細に説明する。[Example] Hereinafter, embodiments will be described in detail with reference to the drawings.
第1図(a)〜(e)は本発明にかかる形成方法の工程
順図を示している。FIGS. 1(a) to 1(e) show step-by-step diagrams of the forming method according to the present invention.
第1図(a)参照;従来と同様に、半導体基板1上に5
i02膜2を介して第一層目のアルミニウム配線3を形
成し、その上に眉間絶縁膜4を形成する。See FIG. 1(a); as in the conventional case, five
A first layer of aluminum wiring 3 is formed via the i02 film 2, and a glabellar insulating film 4 is formed thereon.
この層間絶縁膜4も従来と同じく、ヒロック防止膜41
とSOG膜42とPSG膜43とを順次に積層した3層
からなる絶縁膜であり、その形成方法は従来と同様であ
る。且つ、眉間絶縁膜を被着した後、同様に450℃、
30分間加熱して脱ガスをおこなう。This interlayer insulating film 4 also has a hillock prevention film 41 similar to the conventional one.
The insulating film is made up of three layers in which a SOG film 42 and a PSG film 43 are sequentially laminated, and the method of forming it is the same as the conventional one. After applying the glabellar insulating film, the temperature was also 450°C.
Heat for 30 minutes to degas.
第1図(b)参照;次いで、電極窓5を窓開けするため
に、眉間絶縁膜4をエツチング+る。これも従来と同様
に、フォトレジスト膜(図示せず)をマスクにして、同
じ<CF4 :CHF3 =1 : Iの混合ガスを
反応ガスとしたRIEによる異方性エツチングをおこ、
なう。Refer to FIG. 1(b); Next, in order to open the electrode window 5, the glabellar insulating film 4 is etched. Similarly to the conventional method, anisotropic etching is performed by RIE using a photoresist film (not shown) as a mask and using the same <CF4:CHF3=1:I mixed gas as a reaction gas.
Now.
第1図(e)参照;次いで、プラズマ気相成長法によっ
て膜厚1000人(500〜2000人の範囲)程度の
窒化シリコン(Si3 N4 )膜15を全面に被着す
る。Refer to FIG. 1(e); Next, a silicon nitride (Si3 N4) film 15 having a thickness of about 1000 layers (range of 500 to 2000 layers) is deposited over the entire surface by plasma vapor deposition.
543N4膜のプラズマ気相成長法は、例えば、モノシ
ラン(SiH4)と亜硝酸(N20)とを導入して0.
l Torr程度の減圧度にし、200KH2O高周
波を印加して反応ガスをプラズマ化して成長する方法で
ある。このSi3N4膜工5が前記ヒロック防止膜41
.SOG膜42.PSG膜43に含まれるガス、例えば
、水素ガス、−酸化炭素ガス、水蒸気などのガスを透過
しない第2図の絶縁膜であり、膜質が緻密で、エツチン
グされ難<、ある程度硬度をもったものである。543N4 film, for example, monosilane (SiH4) and nitrous acid (N20) are introduced to form a 0.543N4 film.
This is a method of growing by reducing the pressure to about 1 Torr and applying 200 KH2O high frequency to turn the reaction gas into plasma. This Si3N4 film 5 is the hillock prevention film 41.
.. SOG film 42. The insulating film shown in Fig. 2 is impermeable to gases contained in the PSG film 43, such as hydrogen gas, -carbon oxide gas, and water vapor, and has a dense film quality, is difficult to etch, and has a certain degree of hardness. It is.
第1図(d)参照;次いで、前記電極窓5を窓開けした
時と同様に、CF4 :CHF3 =1 : 1を反
応ガスとしたRIEによって、垂直にSi3N4膜の異
方性エツチングをおこなう。そうすると、電極窓5の側
面に垂直に被着しているSi3N4膜15のみを残存さ
せ、他の面のSi3N4膜は全部除去することができる
。Refer to FIG. 1(d); Next, in the same way as when the electrode window 5 was opened, the Si3N4 film was anisotropically etched vertically by RIE using CF4:CHF3=1:1 as a reaction gas. In this way, only the Si3N4 film 15 vertically deposited on the side surface of the electrode window 5 can remain, and all the Si3N4 films on other surfaces can be removed.
第1図(e)参照:しかる後、Si3 N4膜15を側
面に有する電極窓5を含む層間絶縁膜4の上に、膜厚0
.7〜1μmのアルミニウム膜をスパッタ法で被着し、
フォトプロセスでパターンニングして第二層目のアルミ
ニウム配線16を形成する。そうすると、電極窓からの
脱ガスはSi3N4膜15で抑制され、電極窓5内にア
ルミニウム膜を完全に付着させることができる。Refer to FIG. 1(e): After that, a film with a thickness of 0
.. A 7-1 μm aluminum film is deposited by sputtering,
A second layer of aluminum wiring 16 is formed by patterning using a photo process. Then, degassing from the electrode window is suppressed by the Si3N4 film 15, and the aluminum film can be completely adhered within the electrode window 5.
従って、第1層目のアルミニウム配線と第2層目のアル
ミニウム配線との電極窓における接続が完全になり、コ
ンタクト抵抗を低減させることができる。Therefore, the connection between the first-layer aluminum wiring and the second-layer aluminum wiring at the electrode window becomes perfect, and contact resistance can be reduced.
上記が実施例であり、本実施例では、ガス透過性の小さ
い第2の絶縁膜としてプラズマ気相成長させたSi3N
4膜15で説明したが、必ずしもこの膜に限るものでな
く、絶縁膜に含有するガスの透過を防止し得る絶縁膜で
あれば他の絶縁膜でもよい。例えば、スパッタ法で被着
させた5i02膜やプラズマ気相成長させた5i02膜
をも使用することができる。且つ、との膜質の目安とし
ては、エツチング耐性が考えられ、例えば、2,5%弗
酸でエツチングした際、エツチング速度が1000人/
分程度以下のものが適している。The above is an example, and in this example, Si3N grown by plasma vapor phase growth was used as the second insulating film with low gas permeability.
Although the fourth film 15 has been described, the present invention is not limited to this film, and any other insulating film may be used as long as it can prevent the gas contained in the insulating film from permeating. For example, a 5i02 film deposited by sputtering or a 5i02 film deposited by plasma vapor deposition can also be used. Etching resistance is considered as a guideline for the film quality. For example, when etching with 2.5% hydrofluoric acid, the etching speed is 1000 people/
Anything less than a minute is suitable.
[発明の効果コ
以上の説明から明らかなように、本発明によれば、配線
接続の電極窓におけるコンタクト抵抗が減少して、高集
積化IC,LSIの品質・信頼性の向上に大きく役立つ
ものである。[Effects of the Invention] As is clear from the above description, according to the present invention, the contact resistance in the electrode window for wiring connection is reduced, which greatly contributes to improving the quality and reliability of highly integrated ICs and LSIs. It is.
第1図(a)〜(1141は本発明にかかる形成方法の
工程順断面図、
第2図(a)〜(C1は従来の形成方法の工程順断面図
である。
図において、
1は半導体基板、 2は5i02膜、3は第1層目
のアルミニウム配線、
4は層間絶縁膜(絶縁膜)、
41はヒロック防止膜、 42はSOG膜、43はPS
G膜、 5は電極窓、6.16は第2層目のア
ルミニウム配線、15はプラズマ気相成長したSi3N
4膜(ガス透過性の小さい第2の絶縁膜)
を示している。
オ祁θFir−ti剣栄へ方地のりiyl*kfMy図
第1図
4発明IJ’か5P=F”k”J 進/l r#ff#
#61D第1図
伏朱/形へ方はめrガ噴融m
第2図1A to 1141 are step-by-step sectional views of a forming method according to the present invention, and FIGS. 2A to 2C are step-by-step sectional views of a conventional forming method. In the figures, 1 is a semiconductor Substrate, 2 is 5i02 film, 3 is first layer aluminum wiring, 4 is interlayer insulation film (insulating film), 41 is hillock prevention film, 42 is SOG film, 43 is PS
G film, 5 is an electrode window, 6.16 is the second layer aluminum wiring, 15 is Si3N grown in plasma vapor phase.
4 film (second insulating film with low gas permeability). Oki θFir-ti To Kenei iyl * kf My Figure 1 Figure 4 Invention IJ' or 5P=F”k”J Shin/l r#ff#
#61D Fig. 1 Folding vermilion/shape fit rga eruption m Fig. 2
Claims (1)
む表面に、前記絶縁膜が含有するガスの透過を防止する
第2の絶縁膜を被着する工程、次いで、該第2の絶縁膜
を垂直にエッチングして、前記電極窓の側面にのみ該第
2の絶縁膜を残す工程、 次いで、該電極窓を含む全面にアルミニウム膜を被着し
パターンニングして、アルミニウム配線を形成する工程
が含まれてなることを特徴とする半導体装置の製造方法
。[Claims] After forming an electrode window by opening an insulating film, a step of depositing a second insulating film on the surface including the electrode window to prevent the gas contained in the insulating film from permeating. Next, etching the second insulating film vertically to leave the second insulating film only on the side surfaces of the electrode window; Next, depositing and patterning an aluminum film on the entire surface including the electrode window. A method for manufacturing a semiconductor device, comprising the step of forming an aluminum wiring.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9829787A JPS63262856A (en) | 1987-04-20 | 1987-04-20 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9829787A JPS63262856A (en) | 1987-04-20 | 1987-04-20 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63262856A true JPS63262856A (en) | 1988-10-31 |
Family
ID=14215984
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9829787A Pending JPS63262856A (en) | 1987-04-20 | 1987-04-20 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63262856A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6482653A (en) * | 1987-09-25 | 1989-03-28 | Nec Corp | Semiconductor integrated circuit |
JPH04324957A (en) * | 1991-04-25 | 1992-11-13 | Nec Kyushu Ltd | Semiconductor device |
JPH0590422A (en) * | 1991-09-30 | 1993-04-09 | Sanyo Electric Co Ltd | Semiconductor device |
-
1987
- 1987-04-20 JP JP9829787A patent/JPS63262856A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6482653A (en) * | 1987-09-25 | 1989-03-28 | Nec Corp | Semiconductor integrated circuit |
JPH04324957A (en) * | 1991-04-25 | 1992-11-13 | Nec Kyushu Ltd | Semiconductor device |
JPH0590422A (en) * | 1991-09-30 | 1993-04-09 | Sanyo Electric Co Ltd | Semiconductor device |
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