JP3199942B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device having a multilayer wiring structure, and more particularly to a method of manufacturing a semiconductor device having a plurality of insulating films having different dielectric constants between upper and lower wiring layers. What is used.

[0002]

2. Description of the Related Art Conventionally, in a semiconductor device having a multilayer wiring structure, an insulating film having a low dielectric constant has been provided between upper and lower wiring layers for the purpose of reducing the capacitance between wirings. I have.

FIG. 4 shows an example of a conventional semiconductor device having a multilayer wiring structure. For example, in the conventional apparatus, first, an SiO2 insulating film 2 is formed on a semiconductor substrate 1 by thermal oxidation, and then a first metal wiring 3 as a lower wiring is formed (FIG. 1A).

[0004] Next, the above-described Si including the first metal wiring 3 is formed.
An insulating film 4 is formed on the O2 insulating film 2 by a reduced pressure plasma method, and an insulating film 5 containing a large amount of Si--F bonding groups and Si--OH bonding groups is formed on the insulating film 4 ( FIG.

Then, the upper surface of the insulating film 5 is flattened by, for example, resist etch back RIE or CMP (FIG. 1C). Thereafter, an insulating film 6 for preventing moisture absorption of the insulating film 5 is formed on the flattened insulating film 5 by a low-pressure plasma method, and further, a second metal wiring or the like as an upper wiring is formed. Is performed (FIG. 2D).

However, in the case of the above-mentioned conventional device,
The insulating film 5 containing a large amount of Si—F bonding groups and Si—OH bonding groups is planarized in a state where it is exposed on the surface.

Normally, the insulating film 5 contains a large amount of Si—F bonding groups and Si—OH bonding groups, so that its dielectric constant can be kept low. For this reason, during the processing or after the processing is completed, the insulating film 5 easily absorbs moisture, and the Si—OH bonding group and H 2
This results in increasing the content of -OH linking groups.

Since this causes an increase in the dielectric constant (ε) of the insulating film 5, there is a problem that the characteristics are remarkably deteriorated, such as an increase in an inter-wiring capacitance or an inter-wiring capacitance that limits the operation speed. there were.

[0009]

As described above, conventionally, an insulating film containing a large amount of Si—F bonding groups and Si—OH bonding groups is very easy to absorb moisture, so that the film is exposed to the surface. When planarization is performed in a state where
The disadvantage that the content of the -OH bonding group and the H-OH bonding group increases, and as a result, the characteristics are not stable due to the variation of the dielectric constant, for example, the capacitance between wirings and the capacitance between wirings increase as the dielectric constant increases. was there.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a method of manufacturing a semiconductor device capable of preventing an increase in inter-wiring capacitance or inter-wiring capacitance due to an increase in dielectric constant and stabilizing characteristics. .

[0011]

In order to achieve the above object, in a method of manufacturing a semiconductor device according to the present invention, a plurality of wiring layers having different dielectric constants are provided between upper and lower wiring layers having a multilayer structure. A step of forming a first insulating film having a low dielectric constant on the lower wiring in a case where the insulating films are stacked, and exposing an upper surface of the first insulating film to the outside air;
Forming a second insulating film having a higher dielectric constant than the first insulating film thereon, and flattening the second insulating film without exposing the first insulating film to the surface; Process.

In the method of manufacturing a semiconductor device according to the present invention, in the case where a plurality of insulating films having different dielectric constants are laminated between upper and lower wiring layers having a multilayer structure, Forming a first insulating film containing a predetermined amount of a Si-F bonding group and a Si-OH bonding group on the wiring of (a), and exposing an upper surface of the first insulating film to the outside air. Above the first insulating film, Si-F
Forming a second insulating film having a small content of at least one of a bonding group and / or a Si—OH bonding group;
Flattening the insulating film without exposing the first insulating film to the surface.

[0013]

According to the present invention, since the first insulating film containing a large amount of Si-F bonding groups and Si-OH bonding groups can be prevented from absorbing moisture, the dielectric constant of the insulating film between the wiring layers can be prevented. Can be kept stable.

[0014]

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a schematic configuration of a semiconductor device according to the present invention. That is, this semiconductor device comprises a SiO2 insulating film 12 formed on a Si substrate 11,
The first metal wiring 1 formed on this SiO2 film 12
3. The SiO2 film 12 including the first metal wiring 13
The first insulating film 14 formed thereon, the first insulating film 1
A second insulating film 15 having an upper surface planarized without exposing the surface of the second metal wiring 4 to the surface, a second metal wiring 16 formed on the second insulating film 15, and a second metal wiring 16.
A connection hole (via hole) 17 connecting the first metal wiring 13 and the first metal wiring 13, and a passivation film 18 formed on the main surface of the device including the second metal wiring 16.

The SiO 2 insulating film 12 is formed to a thickness of about 0.6 μm by, for example, a thermal oxidation method. The first
Is formed, for example, by depositing an Al—Cu—Si alloy film to a thickness of about 0.6 μm by a sputtering method and processing the alloy film using a lithography technique and an anisotropic etching technique. Is done.

The first insulating film 14 contains a large amount of Si—F bonding groups and Si—OH bonding groups. For example, a fluorocarbon-based compound gas (500 sec) and TE
Using an OS gas, a film is formed to a thickness of about 0.8 μm in reduced-pressure plasma at about 350 ° C.

The second insulating film 15 contains a smaller amount of Si—F bonding groups than the first insulating film 14. For example, the flow rate of the fluorocarbon compound gas can be maintained without breaking the reduced pressure. With reduced (or
The film is formed with a thickness of about 1.5 μm.

In this case, the relationship between the dielectric constant (ε1) of the first insulating film 14 and the dielectric constant (ε2) of the second insulating film 15 is ε1 <ε2, for example, ε1 = 3.4, ε2
= 4.1.

The second insulating film 15 is made of Si-
For example, the first insulating film 14 may contain a smaller amount of Si—OH bonding groups than the F bonding groups.

The second insulating film 15 is formed of, for example, a Chemical Mechanical Polish.
The surface is planarized by etching using a hin (CMP) technique.

The amount of etching in this case is such that the first insulating film 14 is not exposed on the surface, for example, the second insulating film 14 having a thickness of 0.1 μm or more is formed on the first insulating film 14. Etching is performed so that the insulating film 15 remains.

This etching can be easily realized, for example, by controlling the load of the CMP apparatus and the number of rotations of the motor. The second metal wiring 16 is made of, for example, Al-Cu
-An alloy film is formed by depositing a Si alloy film to a thickness of about 0.6 μm by a sputtering method, and processing the alloy film using a lithography technique and an anisotropic etching technique.

The connection hole 17 is provided in the second metal wiring 1.
Before the formation of 6, corresponding to the connection between the first metal wiring 13 and the second metal wiring 16, a hole is formed in the first and second insulating films 14 and 15. For example, it is formed by selectively depositing W at about 200 ° C. by, for example, a low pressure CVD method.

The passivation film 18 is formed to a thickness of about 0.3 μm using, for example, TEOS gas in a reduced pressure plasma at about 350 ° C. In addition, an opening 18a for connecting an external electrode is selectively formed in a part of the passivation film 18 by using, for example, a lithography technique and an NH4 F solution.

According to such a configuration, the first insulating film 1
Since the second insulating film 15 can be planarized without exposing the surface to the surface, as a post-treatment, for example, a surface cleaning treatment with H2 O or H2 SO4 and H2 O2
Even when the surface cleaning treatment is performed using a mixed solution of the first insulating film 14 and the first insulating film 14, moisture absorption does not occur in the film.

Therefore, the first insulating film 14 is made of Si-O
It is possible to solve the problems in the conventional device that the H-bonding group and the H-OH-bonding group increase and the dielectric constant ε1 of the first insulating film 14 increases accordingly.

Next, a method of manufacturing the device of this embodiment shown in FIG. 1 will be described with reference to FIG. First, as shown in FIG. 1A, the SiO2 insulating film 12 is formed on a Si substrate 11 to a thickness of about 0.6 μm by, for example, a thermal oxidation method.

After an Al-Cu-Si alloy film is deposited on the SiO2 insulating film 12 to a thickness of about 0.6 μm by, for example, a sputtering method, the alloy film is anisotropically formed by lithography. By processing using an etching technique, the first metal wiring 13 is selectively formed.

Next, as shown in FIG. 2B, the SiO 2 insulating film 12 including the first metal wiring 13 contains a large amount of Si—F bonding groups and Si—OH bonding groups. The first insulating film 14 having a dielectric constant .epsilon.1 of 3.4 is formed, for example, of a fluorocarbon-based compound gas (50
0 sec) and TEOS gas, and is formed into a film having a thickness of about 0.8 μm in a reduced pressure plasma at about 350 ° C.

After the first insulating film 14 is formed, the dielectric constant .epsilon.2 is 4.1, which contains a smaller amount of Si--F bonding groups than the first insulating film 14. The second insulating film 15 is formed to have a thickness of about 1.5 μm with the flow rate of the fluorocarbon-based compound gas reduced (or set to zero), for example, without breaking the reduced pressure state. Filmed.

Thereafter, as shown in FIG. 3C, the second insulating film 15 is etched using, for example, a CMP technique, and is flattened with a thickness of 0.1 μm or more. Then, as shown in FIG. 3D, an opening for connecting the first metal wiring 13 and the second metal wiring 16 is formed.
The connection hole 17 is formed by selectively depositing W at about 200 ° C. by the D method.

Further, A is formed on the second insulating film 15 corresponding to the connection hole 17 by, for example, a sputtering method.
After the l-Cu-Si alloy film is deposited to a thickness of about 0.6 μm, the alloy film is processed using lithography technology and anisotropic etching technology, thereby forming the second metal wiring 16. Are selectively formed.

After that, on the second insulating film 15 including the second metal wiring 16, about 0.3 μm
The passivation film 18 is formed with a thickness of 3 mm.

An opening 18a for connecting an external electrode is selectively formed in a part of the passivation film 18 by using, for example, a lithography technique and an NH4 F solution. The device is manufactured.

As described above, the Si—F bonding group and S
The first insulating film containing a large number of i-OH bonding groups can be prevented from absorbing moisture. That is, without exposing the first insulating film formed containing a large amount of the Si—F bonding group and the Si—OH bonding group to the outside air, a smaller amount of the Si—F bonding is performed by the continuous processing. Second containing a group
Is formed on the first insulating film,
Only the second insulating film is etched so that the first insulating film is not exposed on the surface. Accordingly, the second insulating film can protect the first insulating film from being exposed to the air or a liquid layer even during the etching step and after the end of the step. The rate can be kept stable. Therefore, it is possible to prevent the dielectric constant of the film from being increased due to moisture absorption, thereby preventing the capacitance between wirings and the capacitance between wirings from being increased, thereby preventing the characteristics from becoming unstable due to variations in the dielectric constant. It is.

Further, the planarization of the second insulating film is performed by using the CMP technique, so that the manufacturing process can be simplified. In the above embodiment, the first
Although the case where the first insulating film is formed directly on the metal wiring is described above, the present invention is not limited to this. For example, as shown in FIG. To S
An iO2 insulating film (third insulating film) 21 may be formed.

After the first metal wiring 13 is formed, the SiO 2 insulating film 21 is formed to a thickness of about 0.05 μm in a reduced pressure plasma at about 350 ° C. using, for example, TEOS gas.
Is formed with a thickness of

Thereafter, the above steps are sequentially performed to manufacture a semiconductor device having the structure shown in FIG. In this case, the first metal wiring 13 is
And the first metal wiring 13,
For example, Ti or the like which easily reacts with the first insulating film 14 can be used.

After forming the SiO 2 insulating film 21,
It is also possible to form the first insulating film 14 and the second insulating film 15 continuously while maintaining the reduced pressure state. Of course, various modifications can be made without departing from the scope of the present invention.

[0040]

As described above in detail, according to the present invention, it is possible to prevent an increase in the capacitance between wirings and the capacitance between wirings due to an increase in the dielectric constant, and to manufacture a semiconductor device capable of stabilizing characteristics. We can provide a method.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a schematic configuration of a semiconductor device according to one embodiment of the present invention.

FIG. 2 is a cross-sectional view schematically showing a manufacturing process of the semiconductor device.

FIG. 3 is a sectional view showing a schematic configuration of a semiconductor device according to another embodiment of the present invention;

FIG. 4 is a cross-sectional view of a semiconductor device shown to explain a conventional technique and its problems.

[Explanation of symbols]

11 ... Si substrate, 12 ... SiO2 insulating film, 13 ... first metal wiring, 14 ... first insulating film, 15 ... second insulating film,
16: second metal wiring, 17: connection hole, 18: passivation film, 21: SiO2 insulating film (third insulating film).

──────────────────────────────────────────────────の Continued on the front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 21/3205 H01L 21/3213 H01L 21/768 H01L 21/312-21/318 H01L 21/32 H01L 21 / 47-21/475

Claims (5)

(57) [Claims] 1. A method of manufacturing a semiconductor device, comprising: stacking a plurality of insulating films having different dielectric constants between upper and lower wiring layers having a multilayer structure; Forming a second insulating film having a higher dielectric constant than the first insulating film thereon without exposing the upper surface of the first insulating film to the outside air; A step of flattening the second insulating film without exposing the first insulating film to the surface. 2. A method for manufacturing a semiconductor device, comprising: stacking a plurality of insulating films having different dielectric constants between upper and lower wiring layers having a multilayer structure, wherein a predetermined amount of Si is provided on the lower wiring. Forming a first insulating film containing a —F bonding group and a Si—OH bonding group; and exposing the upper surface of the first insulating film without exposing the upper surface of the first insulating film to the outside air. Si—F bonding group and S
a step of forming a second insulating film having a small content of both or one of the i-OH bonding groups; and a step of flattening the second insulating film without exposing the first insulating film to the surface. A method for manufacturing a semiconductor device, comprising: 3. The step of flattening the second insulating film,
Chemical Mechanical Polish
3. The method for manufacturing a semiconductor device according to claim 2, wherein an ing (CMP) technique is used. 4. The manufacturing method of a semiconductor device according to claim 2, wherein the step of forming the second insulating film is continuously performed in a reduced pressure state in which the first insulating film is formed. Method. 5. A step of forming a third insulating film different from the first and second insulating films between the lower wiring and the first insulating film. A method for manufacturing a semiconductor device according to claim 2.