JPS6325884B2 - - Google Patents

Info

Publication number
JPS6325884B2
JPS6325884B2 JP24920284A JP24920284A JPS6325884B2 JP S6325884 B2 JPS6325884 B2 JP S6325884B2 JP 24920284 A JP24920284 A JP 24920284A JP 24920284 A JP24920284 A JP 24920284A JP S6325884 B2 JPS6325884 B2 JP S6325884B2
Authority
JP
Japan
Prior art keywords
hole
printed wiring
multilayer printed
wiring board
mark
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP24920284A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61125711A (ja
Inventor
Shinji Okamoto
Toshinori Fujii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP24920284A priority Critical patent/JPS61125711A/ja
Publication of JPS61125711A publication Critical patent/JPS61125711A/ja
Publication of JPS6325884B2 publication Critical patent/JPS6325884B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4638Aligning and fixing the circuit boards before lamination; Detecting or measuring the misalignment after lamination; Aligning external circuit patterns or via connections relative to internal circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Drilling And Boring (AREA)
JP24920284A 1984-11-26 1984-11-26 多層印刷配線板の孔穿設位置検出法 Granted JPS61125711A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24920284A JPS61125711A (ja) 1984-11-26 1984-11-26 多層印刷配線板の孔穿設位置検出法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24920284A JPS61125711A (ja) 1984-11-26 1984-11-26 多層印刷配線板の孔穿設位置検出法

Publications (2)

Publication Number Publication Date
JPS61125711A JPS61125711A (ja) 1986-06-13
JPS6325884B2 true JPS6325884B2 (enrdf_load_stackoverflow) 1988-05-27

Family

ID=17189426

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24920284A Granted JPS61125711A (ja) 1984-11-26 1984-11-26 多層印刷配線板の孔穿設位置検出法

Country Status (1)

Country Link
JP (1) JPS61125711A (enrdf_load_stackoverflow)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4899440A (en) * 1986-12-31 1990-02-13 Systems Analysis And Integration Method and apparatus for locating targets on a panel and performing work operations thereon
JPH0271957A (ja) * 1988-09-01 1990-03-12 Matsushita Electric Works Ltd 穴加工方法及び装置
US5611147A (en) * 1993-02-23 1997-03-18 Faro Technologies, Inc. Three dimensional coordinate measuring apparatus
JP4844714B2 (ja) * 2005-08-22 2011-12-28 ミツミ電機株式会社 多層配線基板
CN108811333A (zh) * 2018-06-22 2018-11-13 胜宏科技(惠州)股份有限公司 一种提高背钻孔品质的方法
CN111113549B (zh) * 2019-12-16 2021-11-09 广州兴森快捷电路科技有限公司 超厚芯板冲孔系统及超厚芯板冲孔方法

Also Published As

Publication number Publication date
JPS61125711A (ja) 1986-06-13

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