JPS6325375B2 - - Google Patents
Info
- Publication number
- JPS6325375B2 JPS6325375B2 JP58155414A JP15541483A JPS6325375B2 JP S6325375 B2 JPS6325375 B2 JP S6325375B2 JP 58155414 A JP58155414 A JP 58155414A JP 15541483 A JP15541483 A JP 15541483A JP S6325375 B2 JPS6325375 B2 JP S6325375B2
- Authority
- JP
- Japan
- Prior art keywords
- microprocessor
- memory
- programmable read
- prom
- mpu
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Power Sources (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58155414A JPS6048542A (ja) | 1983-08-25 | 1983-08-25 | パワ−セ−ブ方式 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58155414A JPS6048542A (ja) | 1983-08-25 | 1983-08-25 | パワ−セ−ブ方式 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6048542A JPS6048542A (ja) | 1985-03-16 |
| JPS6325375B2 true JPS6325375B2 (show.php) | 1988-05-25 |
Family
ID=15605470
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58155414A Granted JPS6048542A (ja) | 1983-08-25 | 1983-08-25 | パワ−セ−ブ方式 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6048542A (show.php) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07109051B2 (ja) * | 1992-05-08 | 1995-11-22 | 謙治 村澤 | ワッペン・マークの製造方法 |
-
1983
- 1983-08-25 JP JP58155414A patent/JPS6048542A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6048542A (ja) | 1985-03-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5125081A (en) | Inter-configuration changing controller based upon the connection and configuration information among plurality of clusters and the global storage | |
| JPS6073774A (ja) | インタ−フエ−ス回路 | |
| JPH0113573B2 (show.php) | ||
| US7725621B2 (en) | Semiconductor device and data transfer method | |
| US4694393A (en) | Peripheral unit for a microprocessor system | |
| JPH04363746A (ja) | Dma機能を有するマイクロコンピュータシステム | |
| EP0778579A3 (en) | A synchronous dynamic memory integrated circuit, a method for accessing such a memory, and system comprising such a memory | |
| JPS6325375B2 (show.php) | ||
| US6182207B1 (en) | Microcontroller with register system for the indirect accessing of internal memory via auxiliary register | |
| EP0481485A2 (en) | Microcomputer having logic circuit for prohibiting application of subclock to selected internal unit | |
| EP0783148A2 (en) | Power conserving clocking system | |
| JPS6146552A (ja) | 情報処理装置 | |
| JPH05155295A (ja) | 車輌用電子制御システムの制御方法 | |
| JP2970225B2 (ja) | 入出力回路 | |
| JPH0222748A (ja) | 不揮発生メモリ制御回路 | |
| JPS61183764A (ja) | ダイレクトメモリアクセス制御方式 | |
| JPS6336022B2 (show.php) | ||
| JP3621330B2 (ja) | フラッシュ・メモリへのデータ書き込み方法、そのフラッシュ・メモリ搭載のマイクロコンピュータ、およびそのデータ書き込み用フラッシュ・メモリ・ライタ | |
| JPS6061816A (ja) | 電源制御回路方式 | |
| JPS5844426Y2 (ja) | プロセッサ間情報転送装置 | |
| JP4174272B2 (ja) | デバイス制御装置 | |
| JPH08185370A (ja) | マイクロ・プロセッサ制御装置 | |
| JPS6229806B2 (show.php) | ||
| JPH04291096A (ja) | 半導体装置 | |
| JPS61153770A (ja) | 画像処理装置 |